USE_DSP VHDL Example - USE_DSP VHDL Example - 2024.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)
Document_ID
UG901
Release_Date
2024-12-11
Version
2024.2 English
attribute use_dsp : string;
attribute use_dsp of P_reg : signal is "no"