Design Recommendations for RTL Kernels - Design Recommendations for RTL Kernels - 2024.2 English - UG1700

RTL kernels should be designed with recommendations from the UltraFast Design Methodology Guide for FPGAs and SoCs (UG949). In addition to adhering to the interface and packaging requirements, the kernels should be designed with the following performance goals in mind:

• Memory Performance Optimizations for AXI4 Interface
• Quality of Results Considerations
• Debug and Verification Considerations