The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 11/20/2024 Version 2024.2 | |
| DDR Memory Controller for DDR4, LPDDR4, and LPDDR4X | Updated GitHub link. |
| Flash Memory Controllers | Updated description and updated SD/eMMC row. |
| On-Chip Memory Resources | Updated XRAM description. |
| Security | Updated Cumulative Secure Boot Operations table. |
| Segmented Configuration | Added new section. |
| Tandem Configuration | Added Segmented configuration description. |
| 05/30/2024 Version 2024.1 | |
| Introduction to Versal Adaptive SoCs | Updated taxonomy. |
| Navigating Content by Design Process | Added AI Engine-ML Kernel and Graph Programming Guide (UG1603). |
| System Design Types | Updated Platform Source for Platform-based. |
| Using the Vitis Environment in the Design Flows | Updated Vitis tools bullet description. |