Profiling - 2024.2 English

Vitis Libraries

Release Date
2025-05-14
Version
2024.2 English

The ISP Pipeline design is validated on an Alveo U200 board at 300 MHz frequency. Hardware resource utilization is shown in the following table.

Table 804 Table 1: Hardware Resources for the ISP Pipeline
Dataset LUT BRAM FF DSP
Resolution NPPC other params
4K 1 Filter - 3x3 18987 24 17713 91
FHD 1 Filter - 3x3 19254 19 17534 88

The performance is shown in the following table.

Table 805 Table 2: Performance Numbers in Frames Per Second (FPS) for the ISP Pipeline
Dataset FPS(CPU) FPS(FPGA)
4k (3840x2160) 0.11 135
Full HD (1920x1080) 0.44 520