Implementation - 2024.2 English

The input matrix should ensure that the following conditions hold:

1. No duplicate edges
2. compressed sparse column/row (CSC/CSR) format

The algorithm implementation is shown as the figure below:

Figure 1 : calculate degree architecture on FPGA

As seen from the figure:

1. Module calculate degree: first get the vertex node’s outdegree and keep them in one DDR buffer.