Intrinsics and operators that allows you to perform addition and substraction operations on all types of vectors. More...

Overview

Intrinsics and operators that allows you to perform addition and substraction operations on all types of vectors.

On fixed point vectors, logical operations such as AND, OR and ABS are available. There is no differences between operators and intrinsics.

ADD intrinsic example

v32acc32 a   = //init
v32acc32 b   = //init
v32acc32 res = //init
 
res = add(a, b);
a   = add(a, b);

+ operator example

v32acc32 a   = //init
v32acc32 b   = //init
v32acc32 res = //init
 
res = a + b;
a   = a + b;

Accumulator Operators and Intrinsics

The accumulator operators and intrinsics allow you to perform different operations on an Accumulator Data Types. These operations are addition, subtraction and their variants. Also, it is possible to create a accumulator with all values set to zero. Operators for addition, subtraction and negation are provided. There is no difference between operators and intrinsics.
The different intrinsics can be summerized as:

ADD:    res = acc_in1 + acc_in2
SUB:    res = acc_in1 - acc_in2
NEGADD: res = -(acc_in1 + acc_in2)
NEGSUB: res = -(acc_in1 - acc_in2)
NEG:    res = -acc_in1
CLR:    res = clr() // sets all elements to zero

The conf variants allow usage of the configuration register via the provided masks. The following masks are available:

int zero_acc1: Zeroing of acc1. If it is one then acc1 is zeroed.
 
int sub_acc1: Negation mask of acc1. If it is one acc1 will be negated.
int sub_acc2: Negation mask of acc2. If it is one acc2 will be negated.
 
int shift16: Shift mask of acc1. If a bit is set the <<16 operation will be executed on acc1.

Vector addition/subtraction intrinsics for datatype v64uint8
v64uint8	add (v64uint8 a, v64uint8 b)
	Vector addition.

v64uint8	sub (v64uint8 a, v64uint8 b)
	Vector subtraction.

v64uint8	addsub (v64uint8 a, v64uint8 b, unsigned long long as)
	Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

v64uint8	operator+ (v64uint8 a, v64uint8 b)
	Vector addition.

v64uint8	operator- (v64uint8 a, v64uint8 b)
	Vector subtraction.

v64uint8	neg_gtz (v64uint8 a, unsigned long long &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v64uint8	neg_gtz (v64uint8 a, bool sgn, unsigned long long &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v64uint8	neg (v64uint8 a)
	Negates vector a and returns the result.

v64uint8	operator- (v64uint8 a)
	Negates vector a and returns the result.

Vector addition/subtraction intrinsics for datatype v64int8
v64int8	add (v64int8 a, v64int8 b)
	Vector addition.

v64int8	sub (v64int8 a, v64int8 b)
	Vector subtraction.

v64int8	addsub (v64int8 a, v64int8 b, unsigned long long as)
	Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

v64int8	operator+ (v64int8 a, v64int8 b)
	Vector addition.

v64int8	operator- (v64int8 a, v64int8 b)
	Vector subtraction.

v64int8	neg_gtz (v64int8 a, unsigned long long &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v64int8	neg_gtz (v64int8 a, bool sgn, unsigned long long &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v64int8	neg (v64int8 a)
	Negates vector a and returns the result.

v64int8	operator- (v64int8 a)
	Negates vector a and returns the result.

Vector addition/subtraction intrinsics for datatype v32uint16
v32uint16	add (v32uint16 a, v32uint16 b)
	Vector addition.

v32uint16	sub (v32uint16 a, v32uint16 b)
	Vector subtraction.

v32uint16	addsub (v32uint16 a, v32uint16 b, unsigned int as)
	Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

v32uint16	operator+ (v32uint16 a, v32uint16 b)
	Vector addition.

v32uint16	operator- (v32uint16 a, v32uint16 b)
	Vector subtraction.

v32uint16	neg_gtz (v32uint16 a, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v32uint16	neg_gtz (v32uint16 a, bool sgn, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v32uint16	neg (v32uint16 a)
	Negates vector a and returns the result.

v32uint16	operator- (v32uint16 a)
	Negates vector a and returns the result.

Vector addition/subtraction intrinsics for datatype v32int16
v32int16	add (v32int16 a, v32int16 b)
	Vector addition.

v32int16	sub (v32int16 a, v32int16 b)
	Vector subtraction.

v32int16	addsub (v32int16 a, v32int16 b, unsigned int as)
	Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

v32int16	operator+ (v32int16 a, v32int16 b)
	Vector addition.

v32int16	operator- (v32int16 a, v32int16 b)
	Vector subtraction.

v32int16	neg_gtz (v32int16 a, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v32int16	neg_gtz (v32int16 a, bool sgn, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v32int16	neg (v32int16 a)
	Negates vector a and returns the result.

v32int16	operator- (v32int16 a)
	Negates vector a and returns the result.

Vector addition/subtraction intrinsics for datatype v16cint16
v16cint16	add (v16cint16 a, v16cint16 b)
	Vector addition.

v16cint16	sub (v16cint16 a, v16cint16 b)
	Vector subtraction.

v16cint16	operator+ (v16cint16 a, v16cint16 b)
	Vector addition.

v16cint16	operator- (v16cint16 a, v16cint16 b)
	Vector subtraction.

v16cint16	neg (v16cint16 a)
	Negates vector a and returns the result.

v16cint16	operator- (v16cint16 a)
	Negates vector a and returns the result.

Vector addition/subtraction intrinsics for datatype v16uint32
v16uint32	add (v16uint32 a, v16uint32 b)
	Vector addition.

v16uint32	sub (v16uint32 a, v16uint32 b)
	Vector subtraction.

v16uint32	addsub (v16uint32 a, v16uint32 b, unsigned int as)
	Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

v16uint32	operator+ (v16uint32 a, v16uint32 b)
	Vector addition.

v16uint32	operator- (v16uint32 a, v16uint32 b)
	Vector subtraction.

v16uint32	neg_gtz (v16uint32 a, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v16uint32	neg_gtz (v16uint32 a, bool s, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v16uint32	neg (v16uint32 a)
	Negates vector a and returns the result.

v16uint32	operator- (v16uint32 a)
	Negates vector a and returns the result.

Vector addition/subtraction intrinsics for datatype v16int32
v16int32	add (v16int32 a, v16int32 b)
	Vector addition.

v16int32	sub (v16int32 a, v16int32 b)
	Vector subtraction.

v16int32	addsub (v16int32 a, v16int32 b, unsigned int as)
	Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

v16int32	operator+ (v16int32 a, v16int32 b)
	Vector addition.

v16int32	operator- (v16int32 a, v16int32 b)
	Vector subtraction.

v16int32	neg_gtz (v16int32 a, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v16int32	neg_gtz (v16int32 a, bool s, unsigned int &cmp)
	Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

v16int32	neg (v16int32 a)
	Negates vector a and returns the result.

v16int32	operator- (v16int32 a)
	Negates vector a and returns the result.

Vector addition/subtraction intrinsics for datatype v8cint32
v8cint32	add (v8cint32 a, v8cint32 b)
	Vector addition.

v8cint32	sub (v8cint32 a, v8cint32 b)
	Vector subtraction.

v8cint32	operator+ (v8cint32 a, v8cint32 b)
	Vector addition.

v8cint32	operator- (v8cint32 a, v8cint32 b)
	Vector subtraction.

v8cint32	neg (v8cint32 a)
	Negates vector a and returns the result.

v8cint32	operator- (v8cint32 a)
	Negates vector a and returns the result.

Accumulator vector addition/subtraction intrinsics
v32acc32	add (v32acc32 acc1, v32acc32 acc2)
	Accumulator addition

v32acc32	sub (v32acc32 acc1, v32acc32 acc2)
	Accumulator subtraction

v32acc32	negadd (v32acc32 acc1, v32acc32 acc2)
	Accumulator addition with negation of result

v32acc32	negsub (v32acc32 acc1, v32acc32 acc2)
	Accumulator addition with negation of result

v32acc32	neg (v32acc32 acc)
	Accumulator negation

v32acc32	clr32 ()
	Returns an accumulator vector with all lanes zeroed.

v32acc32	broadcast_zero_to_v32acc32 ()
	Returns an accumulator vector with all lanes zeroed

v32acc32	add_conf (v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with configuration of accumulator lanes.

v32acc32	sub_conf (v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator subtraction with configuration of accumulator lanes.

v32acc32	negadd_conf (v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v32acc32	negsub_conf (v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v32acc32	neg_conf (v32acc32 acc, int zero_acc1, int shift16, int sub_acc)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v32acc32	operator+ (v32acc32 acc1, v32acc32 acc2)
	Accumulator addition

v32acc32	operator- (v32acc32 acc1, v32acc32 acc2)
	Accumulator subtraction

v32acc32	operator- (v32acc32 acc)
	Accumulator negation

v16acc64	add (v16acc64 acc1, v16acc64 acc2)
	Accumulator addition

v16acc64	sub (v16acc64 acc1, v16acc64 acc2)
	Accumulator subtraction

v16acc64	negadd (v16acc64 acc1, v16acc64 acc2)
	Accumulator addition with negation of result

v16acc64	negsub (v16acc64 acc1, v16acc64 acc2)
	Accumulator addition with negation of result

v16acc64	neg (v16acc64 acc)
	Accumulator negation

v16acc64	clr16 ()
	Returns an accumulator vector with all lanes zeroed.

v16acc64	broadcast_zero_to_v16acc64 ()
	Returns an accumulator vector with all lanes zeroed

v16acc64	add_conf (v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with configuration of accumulator lanes.

v16acc64	sub_conf (v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator subtraction with configuration of accumulator lanes.

v16acc64	negadd_conf (v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16acc64	negsub_conf (v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16acc64	neg_conf (v16acc64 acc, int zero_acc1, int shift16, int sub_acc)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16acc64	operator+ (v16acc64 acc1, v16acc64 acc2)
	Accumulator addition

v16acc64	operator- (v16acc64 acc1, v16acc64 acc2)
	Accumulator subtraction

v16acc64	operator- (v16acc64 acc)
	Accumulator negation

v8cacc64	add (v8cacc64 acc1, v8cacc64 acc2)
	Accumulator addition

v8cacc64	sub (v8cacc64 acc1, v8cacc64 acc2)
	Accumulator subtraction

v8cacc64	negadd (v8cacc64 acc1, v8cacc64 acc2)
	Accumulator addition with negation of result

v8cacc64	negsub (v8cacc64 acc1, v8cacc64 acc2)
	Accumulator addition with negation of result

v8cacc64	neg (v8cacc64 acc)
	Accumulator negation

v8cacc64	clr16c ()
	Returns an accumulator vector with all lanes zeroed.

v8cacc64	broadcast_zero_to_v8cacc64 ()
	Returns an accumulator vector with all lanes zeroed

v8cacc64	add_conf (v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with configuration of accumulator lanes.

v8cacc64	sub_conf (v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator subtraction with configuration of accumulator lanes.

v8cacc64	negadd_conf (v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v8cacc64	negsub_conf (v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v8cacc64	neg_conf (v8cacc64 acc, int zero_acc1, int shift16, int sub_acc)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v8cacc64	operator+ (v8cacc64 acc1, v8cacc64 acc2)
	Accumulator addition

v8cacc64	operator- (v8cacc64 acc1, v8cacc64 acc2)
	Accumulator subtraction

v8cacc64	operator- (v8cacc64 acc)
	Accumulator negation

v16accfloat	add (v16accfloat acc1, v16accfloat acc2)
	Accumulator addition

v16accfloat	sub (v16accfloat acc1, v16accfloat acc2)
	Accumulator subtraction

v16accfloat	negadd (v16accfloat acc1, v16accfloat acc2)
	Accumulator addition with negation of result

v16accfloat	negsub (v16accfloat acc1, v16accfloat acc2)
	Accumulator addition with negation of result

v16accfloat	neg (v16accfloat acc)
	Accumulator negation

v16accfloat	clr16f ()
	Returns an accumulator vector with all lanes zeroed.

v16accfloat	broadcast_zero_to_v16accfloat ()
	Returns an accumulator vector with all lanes zeroed

v16accfloat	add_conf (v16accfloat acc1, v16accfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator addition with configuration of accumulator lanes.

v16accfloat	sub_conf (v16accfloat acc1, v16accfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator subtraction with configuration of accumulator lanes.

v16accfloat	negadd_conf (v16accfloat acc1, v16accfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16accfloat	negsub_conf (v16accfloat acc1, v16accfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16accfloat	neg_conf (v16accfloat acc, int zero_acc1, int sub_acc)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16accfloat	operator+ (v16accfloat acc1, v16accfloat acc2)
	Accumulator addition

v16accfloat	operator- (v16accfloat acc1, v16accfloat acc2)
	Accumulator subtraction

v16accfloat	operator- (v16accfloat acc)
	Accumulator negation

v8caccfloat	add (v8caccfloat acc1, v8caccfloat acc2)
	Accumulator addition

v8caccfloat	sub (v8caccfloat acc1, v8caccfloat acc2)
	Accumulator subtraction

v8caccfloat	negadd (v8caccfloat acc1, v8caccfloat acc2)
	Accumulator addition with negation of result

v8caccfloat	negsub (v8caccfloat acc1, v8caccfloat acc2)
	Accumulator addition with negation of result

v8caccfloat	neg (v8caccfloat acc)
	Accumulator negation

v8caccfloat	add_conf (v8caccfloat acc1, v8caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator addition with configuration of accumulator lanes.

v8caccfloat	sub_conf (v8caccfloat acc1, v8caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator subtraction with configuration of accumulator lanes.

v8caccfloat	negadd_conf (v8caccfloat acc1, v8caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v8caccfloat	negsub_conf (v8caccfloat acc1, v8caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v8caccfloat	neg_conf (v8caccfloat acc, int zero_acc1, int sub_acc)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v8caccfloat	operator+ (v8caccfloat acc1, v8caccfloat acc2)
	Accumulator addition

v8caccfloat	operator- (v8caccfloat acc1, v8caccfloat acc2)
	Accumulator subtraction

v8caccfloat	operator- (v8caccfloat acc)
	Accumulator negation

v16caccfloat	add (v16caccfloat acc1, v16caccfloat acc2) chess_property(do_generate)
	Accumulator addition.

v16caccfloat	sub (v16caccfloat acc1, v16caccfloat acc2) chess_property(do_generate)
	Accumulator subtraction.

v16caccfloat	negadd (v16caccfloat acc1, v16caccfloat acc2) chess_property(do_generate)
	Accumulator addition with negation of result.

v16caccfloat	negsub (v16caccfloat acc1, v16caccfloat acc2) chess_property(do_generate)
	Accumulator addition with negation of result.

v16caccfloat	neg (v16caccfloat acc) chess_property(do_generate)
	Accumulator negation.

v16caccfloat	add_conf (v16caccfloat acc1, v16caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator addition with configuration of accumulator lanes.

v16caccfloat	sub_conf (v16caccfloat acc1, v16caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator subtraction with configuration of accumulator lanes.

v16caccfloat	negadd_conf (v16caccfloat acc1, v16caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16caccfloat	negsub_conf (v16caccfloat acc1, v16caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v16caccfloat	neg_conf (v16caccfloat acc, int zero_acc1, int sub_acc) chess_property(do_generate)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v4caccfloat	add (v4caccfloat acc1, v4caccfloat acc2) chess_property(do_generate)
	Accumulator addition.

v4caccfloat	sub (v4caccfloat acc1, v4caccfloat acc2) chess_property(do_generate)
	Accumulator subtraction.

v4caccfloat	negadd (v4caccfloat acc1, v4caccfloat acc2) chess_property(do_generate)
	Accumulator addition with negation of result.

v4caccfloat	negsub (v4caccfloat acc1, v4caccfloat acc2) chess_property(do_generate)
	Accumulator addition with negation of result.

v4caccfloat	neg (v4caccfloat acc) chess_property(do_generate)
	Accumulator negation.

v4caccfloat	add_conf (v4caccfloat acc1, v4caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator addition with configuration of accumulator lanes.

v4caccfloat	sub_conf (v4caccfloat acc1, v4caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator subtraction with configuration of accumulator lanes.

v4caccfloat	negadd_conf (v4caccfloat acc1, v4caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v4caccfloat	negsub_conf (v4caccfloat acc1, v4caccfloat acc2, int zero_acc1, int sub_acc1, int sub_acc2) chess_property(do_generate)
	Accumulator addition with negation of result and configuration of accumulator lanes.

v4caccfloat	neg_conf (v4caccfloat acc, int zero_acc1, int sub_acc) chess_property(do_generate)
	Accumulator addition with negation of result and configuration of accumulator lanes.

Function Documentation

◆ add() [1/15]

v16acc64 add	(	v16acc64	acc1,
		v16acc64	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ add() [2/15]

v16accfloat add	(	v16accfloat	acc1,
		v16accfloat	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ add() [3/15]

v16caccfloat add	(	v16caccfloat	acc1,
		v16caccfloat	acc2
	)

Accumulator addition.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ add() [4/15]

v16cint16 add	(	v16cint16	a,
		v16cint16	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add() [5/15]

v16int32 add	(	v16int32	a,
		v16int32	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add() [6/15]

v16uint32 add	(	v16uint32	a,
		v16uint32	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add() [7/15]

v32acc32 add	(	v32acc32	acc1,
		v32acc32	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ add() [8/15]

v32int16 add	(	v32int16	a,
		v32int16	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add() [9/15]

v32uint16 add	(	v32uint16	a,
		v32uint16	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add() [10/15]

v4caccfloat add	(	v4caccfloat	acc1,
		v4caccfloat	acc2
	)

Accumulator addition.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ add() [11/15]

v64int8 add	(	v64int8	a,
		v64int8	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add() [12/15]

v64uint8 add	(	v64uint8	a,
		v64uint8	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add() [13/15]

v8cacc64 add	(	v8cacc64	acc1,
		v8cacc64	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ add() [14/15]

v8caccfloat add	(	v8caccfloat	acc1,
		v8caccfloat	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ add() [15/15]

v8cint32 add	(	v8cint32	a,
		v8cint32	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ add_conf() [1/7]

v16acc64 add_conf	(	v16acc64	acc1,
		v16acc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ add_conf() [2/7]

v16accfloat add_conf	(	v16accfloat	acc1,
		v16accfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ add_conf() [3/7]

v16caccfloat add_conf	(	v16caccfloat	acc1,
		v16caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ add_conf() [4/7]

v32acc32 add_conf	(	v32acc32	acc1,
		v32acc32	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ add_conf() [5/7]

v4caccfloat add_conf	(	v4caccfloat	acc1,
		v4caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ add_conf() [6/7]

v8cacc64 add_conf	(	v8cacc64	acc1,
		v8cacc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ add_conf() [7/7]

v8caccfloat add_conf	(	v8caccfloat	acc1,
		v8caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ addsub() [1/6]

v16int32 addsub	(	v16int32	a,
		v16int32	b,
		unsigned int	as
	)

Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

Parameters

a	Vector a
b	Vector b
as	Selects if addition or subtraction of lane is performed.

Returns: Result of operation

◆ addsub() [2/6]

v16uint32 addsub	(	v16uint32	a,
		v16uint32	b,
		unsigned int	as
	)

Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

Parameters

a	Vector a
b	Vector b
as	Selects if addition or subtraction of lane is performed.

Returns: Result of operation

◆ addsub() [3/6]

v32int16 addsub	(	v32int16	a,
		v32int16	b,
		unsigned int	as
	)

Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

Parameters

a	Vector a
b	Vector b
as	Selects if addition or subtraction of lane is performed.

Returns: Result of operation

◆ addsub() [4/6]

v32uint16 addsub	(	v32uint16	a,
		v32uint16	b,
		unsigned int	as
	)

Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

Parameters

a	Vector a
b	Vector b
as	Selects if addition or subtraction of lane is performed.

Returns: Result of operation

◆ addsub() [5/6]

v64int8 addsub	(	v64int8	a,
		v64int8	b,
		unsigned long long	as
	)

Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

Parameters

a	Vector a
b	Vector b
as	Selects if addition or subtraction of lane is performed.

Returns: Result of operation

◆ addsub() [6/6]

v64uint8 addsub	(	v64uint8	a,
		v64uint8	b,
		unsigned long long	as
	)

Vector addition or subtraction. Selection of operation is given by as. If a bit of as is zero an addition is performed on the corresponding lane, else a subtraction is performed.

Parameters

a	Vector a
b	Vector b
as	Selects if addition or subtraction of lane is performed.

Returns: Result of operation

◆ broadcast_zero_to_v16acc64()

v16acc64 broadcast_zero_to_v16acc64 ( )

Returns an accumulator vector with all lanes zeroed

Returns: Zeroed accumulator

◆ broadcast_zero_to_v16accfloat()

v16accfloat broadcast_zero_to_v16accfloat ( )

Returns an accumulator vector with all lanes zeroed

Returns: Zeroed accumulator

◆ broadcast_zero_to_v32acc32()

v32acc32 broadcast_zero_to_v32acc32 ( )

Returns an accumulator vector with all lanes zeroed

Returns: Zeroed accumulator

◆ broadcast_zero_to_v8cacc64()

v8cacc64 broadcast_zero_to_v8cacc64 ( )

Returns an accumulator vector with all lanes zeroed

Returns: Zeroed accumulator

◆ clr16()

v16acc64 clr16 ( )

Returns an accumulator vector with all lanes zeroed.

Returns: Zeroed accumulator

Deprecated:: Please use the 'broadcast_zero_to_<accumulator>()' variant instead.

◆ clr16c()

v8cacc64 clr16c ( )

Returns an accumulator vector with all lanes zeroed.

Returns: Zeroed accumulator

Deprecated:: Please use the 'broadcast_zero_to_<accumulator>()' variant instead.

◆ clr16f()

v16accfloat clr16f ( )

Returns an accumulator vector with all lanes zeroed.

Returns: Zeroed accumulator

Deprecated:: Please use the 'broadcast_zero_to_<accumulator>()' variant instead.

◆ clr32()

v32acc32 clr32 ( )

Returns an accumulator vector with all lanes zeroed.

Returns: Zeroed accumulator

Deprecated:: Please use the 'broadcast_zero_to_<accumulator>()' variant instead.

◆ neg() [1/15]

v16acc64 neg ( v16acc64 acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ neg() [2/15]

v16accfloat neg ( v16accfloat acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ neg() [3/15]

v16caccfloat neg ( v16caccfloat acc )

Accumulator negation.

Parameters

acc	Accumulator input

Returns: Result of operation

◆ neg() [4/15]

v16cint16 neg ( v16cint16 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg() [5/15]

v16int32 neg ( v16int32 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg() [6/15]

v16uint32 neg ( v16uint32 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg() [7/15]

v32acc32 neg ( v32acc32 acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ neg() [8/15]

v32int16 neg ( v32int16 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg() [9/15]

v32uint16 neg ( v32uint16 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg() [10/15]

v4caccfloat neg ( v4caccfloat acc )

Accumulator negation.

Parameters

acc	Accumulator input

Returns: Result of operation

◆ neg() [11/15]

v64int8 neg ( v64int8 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg() [12/15]

v64uint8 neg ( v64uint8 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg() [13/15]

v8cacc64 neg ( v8cacc64 acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ neg() [14/15]

v8caccfloat neg ( v8caccfloat acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ neg() [15/15]

v8cint32 neg ( v8cint32 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ neg_conf() [1/7]

v16acc64 neg_conf	(	v16acc64	acc,
		int	zero_acc1,
		int	shift16,
		int	sub_acc
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc	Accumulator input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc	Negation mask of acc

Returns: Result of operation

◆ neg_conf() [2/7]

v16accfloat neg_conf	(	v16accfloat	acc,
		int	zero_acc1,
		int	sub_acc
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc	Accumulator input
zero_acc1	Zeroing mask for acc1
sub_acc	Negation mask of acc

Returns: Result of operation

◆ neg_conf() [3/7]

v16caccfloat neg_conf	(	v16caccfloat	acc,
		int	zero_acc1,
		int	sub_acc
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc	Accumulator input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc	Negation mask of acc

Returns: Result of operation

◆ neg_conf() [4/7]

v32acc32 neg_conf	(	v32acc32	acc,
		int	zero_acc1,
		int	shift16,
		int	sub_acc
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc	Accumulator input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc	Negation mask of acc

Returns: Result of operation

◆ neg_conf() [5/7]

v4caccfloat neg_conf	(	v4caccfloat	acc,
		int	zero_acc1,
		int	sub_acc
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc	Accumulator input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc	Negation mask of acc

Returns: Result of operation

◆ neg_conf() [6/7]

v8cacc64 neg_conf	(	v8cacc64	acc,
		int	zero_acc1,
		int	shift16,
		int	sub_acc
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc	Accumulator input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc	Negation mask of acc

Returns: Result of operation

◆ neg_conf() [7/7]

v8caccfloat neg_conf	(	v8caccfloat	acc,
		int	zero_acc1,
		int	sub_acc
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc	Accumulator input
zero_acc1	Zeroing mask for acc1
sub_acc	Negation mask of acc

Returns: Result of operation

◆ neg_gtz() [1/12]

v16int32 neg_gtz	(	v16int32	a,
		bool	s,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0
sgn	Sign flag. If it is one, vectors a and b are signed else they are unsigned

Returns: Result of negation

◆ neg_gtz() [2/12]

v16int32 neg_gtz	(	v16int32	a,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0

Returns: Result of negation

◆ neg_gtz() [3/12]

v16uint32 neg_gtz	(	v16uint32	a,
		bool	s,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0
sgn	Sign flag. If it is one, vectors a and b are signed else they are unsigned

Returns: Result of negation

◆ neg_gtz() [4/12]

v16uint32 neg_gtz	(	v16uint32	a,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0

Returns: Result of negation

◆ neg_gtz() [5/12]

v32int16 neg_gtz	(	v32int16	a,
		bool	sgn,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0
sgn	Sign flag. If it is one, vectors a and b are signed else they are unsigned

Returns: Result of negation

◆ neg_gtz() [6/12]

v32int16 neg_gtz	(	v32int16	a,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0

Returns: Result of negation

◆ neg_gtz() [7/12]

v32uint16 neg_gtz	(	v32uint16	a,
		bool	sgn,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0
sgn	Sign flag. If it is one, vectors a and b are signed else they are unsigned

Returns: Result of negation

◆ neg_gtz() [8/12]

v32uint16 neg_gtz	(	v32uint16	a,
		unsigned int &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0

Returns: Result of negation

◆ neg_gtz() [9/12]

v64int8 neg_gtz	(	v64int8	a,
		bool	sgn,
		unsigned long long &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0
sgn	Sign flag. If it is one, vectors a and b are signed else they are unsigned

Returns: Result of negation

◆ neg_gtz() [10/12]

v64int8 neg_gtz	(	v64int8	a,
		unsigned long long &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0

Returns: Result of negation

◆ neg_gtz() [11/12]

v64uint8 neg_gtz	(	v64uint8	a,
		bool	sgn,
		unsigned long long &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0
sgn	Sign flag. If it is one, vectors a and b are signed else they are unsigned

Returns: Result of negation

◆ neg_gtz() [12/12]

v64uint8 neg_gtz	(	v64uint8	a,
		unsigned long long &	cmp
	)

Negates vector a and returns the result. Also checks for which vector lanes a >= b is fulfilled.

Parameters

a	Vector a
cmp	Result of: a > 0

Returns: Result of negation

◆ negadd() [1/7]

v16acc64 negadd	(	v16acc64	acc1,
		v16acc64	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negadd() [2/7]

v16accfloat negadd	(	v16accfloat	acc1,
		v16accfloat	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negadd() [3/7]

v16caccfloat negadd	(	v16caccfloat	acc1,
		v16caccfloat	acc2
	)

Accumulator addition with negation of result.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negadd() [4/7]

v32acc32 negadd	(	v32acc32	acc1,
		v32acc32	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negadd() [5/7]

v4caccfloat negadd	(	v4caccfloat	acc1,
		v4caccfloat	acc2
	)

Accumulator addition with negation of result.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negadd() [6/7]

v8cacc64 negadd	(	v8cacc64	acc1,
		v8cacc64	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negadd() [7/7]

v8caccfloat negadd	(	v8caccfloat	acc1,
		v8caccfloat	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negadd_conf() [1/7]

v16acc64 negadd_conf	(	v16acc64	acc1,
		v16acc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negadd_conf() [2/7]

v16accfloat negadd_conf	(	v16accfloat	acc1,
		v16accfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negadd_conf() [3/7]

v16caccfloat negadd_conf	(	v16caccfloat	acc1,
		v16caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negadd_conf() [4/7]

v32acc32 negadd_conf	(	v32acc32	acc1,
		v32acc32	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negadd_conf() [5/7]

v4caccfloat negadd_conf	(	v4caccfloat	acc1,
		v4caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negadd_conf() [6/7]

v8cacc64 negadd_conf	(	v8cacc64	acc1,
		v8cacc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negadd_conf() [7/7]

v8caccfloat negadd_conf	(	v8caccfloat	acc1,
		v8caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negsub() [1/7]

v16acc64 negsub	(	v16acc64	acc1,
		v16acc64	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negsub() [2/7]

v16accfloat negsub	(	v16accfloat	acc1,
		v16accfloat	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negsub() [3/7]

v16caccfloat negsub	(	v16caccfloat	acc1,
		v16caccfloat	acc2
	)

Accumulator addition with negation of result.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negsub() [4/7]

v32acc32 negsub	(	v32acc32	acc1,
		v32acc32	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negsub() [5/7]

v4caccfloat negsub	(	v4caccfloat	acc1,
		v4caccfloat	acc2
	)

Accumulator addition with negation of result.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negsub() [6/7]

v8cacc64 negsub	(	v8cacc64	acc1,
		v8cacc64	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negsub() [7/7]

v8caccfloat negsub	(	v8caccfloat	acc1,
		v8caccfloat	acc2
	)

Accumulator addition with negation of result

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ negsub_conf() [1/7]

v16acc64 negsub_conf	(	v16acc64	acc1,
		v16acc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negsub_conf() [2/7]

v16accfloat negsub_conf	(	v16accfloat	acc1,
		v16accfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negsub_conf() [3/7]

v16caccfloat negsub_conf	(	v16caccfloat	acc1,
		v16caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negsub_conf() [4/7]

v32acc32 negsub_conf	(	v32acc32	acc1,
		v32acc32	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negsub_conf() [5/7]

v4caccfloat negsub_conf	(	v4caccfloat	acc1,
		v4caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negsub_conf() [6/7]

v8cacc64 negsub_conf	(	v8cacc64	acc1,
		v8cacc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ negsub_conf() [7/7]

v8caccfloat negsub_conf	(	v8caccfloat	acc1,
		v8caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator addition with negation of result and configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ operator+() [1/13]

v16acc64 operator+	(	v16acc64	acc1,
		v16acc64	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator+() [2/13]

v16accfloat operator+	(	v16accfloat	acc1,
		v16accfloat	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator+() [3/13]

v16cint16 operator+	(	v16cint16	a,
		v16cint16	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator+() [4/13]

v16int32 operator+	(	v16int32	a,
		v16int32	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator+() [5/13]

v16uint32 operator+	(	v16uint32	a,
		v16uint32	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator+() [6/13]

v32acc32 operator+	(	v32acc32	acc1,
		v32acc32	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator+() [7/13]

v32int16 operator+	(	v32int16	a,
		v32int16	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator+() [8/13]

v32uint16 operator+	(	v32uint16	a,
		v32uint16	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator+() [9/13]

v64int8 operator+	(	v64int8	a,
		v64int8	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator+() [10/13]

v64uint8 operator+	(	v64uint8	a,
		v64uint8	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator+() [11/13]

v8cacc64 operator+	(	v8cacc64	acc1,
		v8cacc64	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator+() [12/13]

v8caccfloat operator+	(	v8caccfloat	acc1,
		v8caccfloat	acc2
	)

Accumulator addition

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator+() [13/13]

v8cint32 operator+	(	v8cint32	a,
		v8cint32	b
	)

Vector addition.

Parameters

a	Vector a
b	Vector b

Returns: Result of addition (a+b)

◆ operator-() [1/26]

v16acc64 operator- ( v16acc64 acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ operator-() [2/26]

v16acc64 operator-	(	v16acc64	acc1,
		v16acc64	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator-() [3/26]

v16accfloat operator- ( v16accfloat acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ operator-() [4/26]

v16accfloat operator-	(	v16accfloat	acc1,
		v16accfloat	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator-() [5/26]

v16cint16 operator- ( v16cint16 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [6/26]

v16cint16 operator-	(	v16cint16	a,
		v16cint16	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ operator-() [7/26]

v16int32 operator- ( v16int32 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [8/26]

v16int32 operator-	(	v16int32	a,
		v16int32	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ operator-() [9/26]

v16uint32 operator- ( v16uint32 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [10/26]

v16uint32 operator-	(	v16uint32	a,
		v16uint32	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ operator-() [11/26]

v32acc32 operator- ( v32acc32 acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ operator-() [12/26]

v32acc32 operator-	(	v32acc32	acc1,
		v32acc32	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator-() [13/26]

v32int16 operator- ( v32int16 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [14/26]

v32int16 operator-	(	v32int16	a,
		v32int16	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ operator-() [15/26]

v32uint16 operator- ( v32uint16 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [16/26]

v32uint16 operator-	(	v32uint16	a,
		v32uint16	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ operator-() [17/26]

v64int8 operator- ( v64int8 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [18/26]

v64int8 operator-	(	v64int8	a,
		v64int8	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ operator-() [19/26]

v64uint8 operator- ( v64uint8 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [20/26]

v64uint8 operator-	(	v64uint8	a,
		v64uint8	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ operator-() [21/26]

v8cacc64 operator- ( v8cacc64 acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ operator-() [22/26]

v8cacc64 operator-	(	v8cacc64	acc1,
		v8cacc64	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator-() [23/26]

v8caccfloat operator- ( v8caccfloat acc )

Accumulator negation

Parameters

acc	Accumulator input

Returns: Result of operation

◆ operator-() [24/26]

v8caccfloat operator-	(	v8caccfloat	acc1,
		v8caccfloat	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ operator-() [25/26]

v8cint32 operator- ( v8cint32 a )

Negates vector a and returns the result.

Parameters

a Vector a

Returns: Result of negation

◆ operator-() [26/26]

v8cint32 operator-	(	v8cint32	a,
		v8cint32	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [1/15]

v16acc64 sub	(	v16acc64	acc1,
		v16acc64	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ sub() [2/15]

v16accfloat sub	(	v16accfloat	acc1,
		v16accfloat	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ sub() [3/15]

v16caccfloat sub	(	v16caccfloat	acc1,
		v16caccfloat	acc2
	)

Accumulator subtraction.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ sub() [4/15]

v16cint16 sub	(	v16cint16	a,
		v16cint16	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [5/15]

v16int32 sub	(	v16int32	a,
		v16int32	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [6/15]

v16uint32 sub	(	v16uint32	a,
		v16uint32	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [7/15]

v32acc32 sub	(	v32acc32	acc1,
		v32acc32	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ sub() [8/15]

v32int16 sub	(	v32int16	a,
		v32int16	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [9/15]

v32uint16 sub	(	v32uint16	a,
		v32uint16	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [10/15]

v4caccfloat sub	(	v4caccfloat	acc1,
		v4caccfloat	acc2
	)

Accumulator subtraction.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ sub() [11/15]

v64int8 sub	(	v64int8	a,
		v64int8	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [12/15]

v64uint8 sub	(	v64uint8	a,
		v64uint8	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub() [13/15]

v8cacc64 sub	(	v8cacc64	acc1,
		v8cacc64	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ sub() [14/15]

v8caccfloat sub	(	v8caccfloat	acc1,
		v8caccfloat	acc2
	)

Accumulator subtraction

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input

Returns: Result of operation

◆ sub() [15/15]

v8cint32 sub	(	v8cint32	a,
		v8cint32	b
	)

Vector subtraction.

Parameters

a	Vector a
b	Vector b

Returns: Result of subtraction (a-b)

◆ sub_conf() [1/7]

v16acc64 sub_conf	(	v16acc64	acc1,
		v16acc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator subtraction with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ sub_conf() [2/7]

v16accfloat sub_conf	(	v16accfloat	acc1,
		v16accfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator subtraction with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ sub_conf() [3/7]

v16caccfloat sub_conf	(	v16caccfloat	acc1,
		v16caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator subtraction with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ sub_conf() [4/7]

v32acc32 sub_conf	(	v32acc32	acc1,
		v32acc32	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator subtraction with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ sub_conf() [5/7]

v4caccfloat sub_conf	(	v4caccfloat	acc1,
		v4caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator subtraction with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1 SHIFT16_DOC
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ sub_conf() [6/7]

v8cacc64 sub_conf	(	v8cacc64	acc1,
		v8cacc64	acc2,
		int	zero_acc1,
		int	shift16,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator subtraction with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
shift16	Shift mask of input accumulator acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

◆ sub_conf() [7/7]

v8caccfloat sub_conf	(	v8caccfloat	acc1,
		v8caccfloat	acc2,
		int	zero_acc1,
		int	sub_acc1,
		int	sub_acc2
	)

Accumulator subtraction with configuration of accumulator lanes.

Parameters

acc1	Accumulator 1 input
acc2	Accumulator 2 input
zero_acc1	Zeroing mask for acc1
sub_acc1	Negation mask of acc1
sub_acc2	Negation mask of acc2

Returns: Result of operation

Overview

ADD intrinsic example

+ operator example

Accumulator Operators and Intrinsics

Vector addition/subtraction intrinsics for datatype v64uint8

Vector addition/subtraction intrinsics for datatype v64int8

Vector addition/subtraction intrinsics for datatype v32uint16

Vector addition/subtraction intrinsics for datatype v32int16

Vector addition/subtraction intrinsics for datatype v16cint16

Vector addition/subtraction intrinsics for datatype v16uint32

Vector addition/subtraction intrinsics for datatype v16int32

Vector addition/subtraction intrinsics for datatype v8cint32

Accumulator vector addition/subtraction intrinsics

Function Documentation

◆ add() [1/15]

◆ add() [2/15]

◆ add() [3/15]

◆ add() [4/15]

◆ add() [5/15]

◆ add() [6/15]

◆ add() [7/15]

◆ add() [8/15]

◆ add() [9/15]

◆ add() [10/15]

◆ add() [11/15]

◆ add() [12/15]

◆ add() [13/15]

◆ add() [14/15]

◆ add() [15/15]

◆ add_conf() [1/7]

◆ add_conf() [2/7]

◆ add_conf() [3/7]

◆ add_conf() [4/7]

◆ add_conf() [5/7]

◆ add_conf() [6/7]

◆ add_conf() [7/7]

◆ addsub() [1/6]

◆ addsub() [2/6]

◆ addsub() [3/6]

◆ addsub() [4/6]

◆ addsub() [5/6]

◆ addsub() [6/6]

◆ broadcast_zero_to_v16acc64()

◆ broadcast_zero_to_v16accfloat()

◆ broadcast_zero_to_v32acc32()

◆ broadcast_zero_to_v8cacc64()

◆ clr16()

◆ clr16c()

◆ clr16f()

◆ clr32()

◆ neg() [1/15]

◆ neg() [2/15]

◆ neg() [3/15]

◆ neg() [4/15]

◆ neg() [5/15]

◆ neg() [6/15]

◆ neg() [7/15]

◆ neg() [8/15]

◆ neg() [9/15]

◆ neg() [10/15]

◆ neg() [11/15]

◆ neg() [12/15]

◆ neg() [13/15]

◆ neg() [14/15]

◆ neg() [15/15]

◆ neg_conf() [1/7]

◆ neg_conf() [2/7]

◆ neg_conf() [3/7]

◆ neg_conf() [4/7]

◆ neg_conf() [5/7]

◆ neg_conf() [6/7]

◆ neg_conf() [7/7]

◆ neg_gtz() [1/12]

◆ neg_gtz() [2/12]

◆ neg_gtz() [3/12]

◆ neg_gtz() [4/12]

◆ neg_gtz() [5/12]

◆ neg_gtz() [6/12]

◆ neg_gtz() [7/12]

◆ neg_gtz() [8/12]