Lab 3: Manual and Directed Routing - 2024.1 English - UG986

Vivado Design Suite Tutorial: Implementation (UG986)

Document ID
UG986
Release Date
2024-05-30
Version
2024.1 English

In this lab, you learn how to use the AMD Vivado™ IDE to assign routing to nets for precisely controlling the timing of a critical portion of the design.

  • Use the BFT HDL example design that is included in the AMD Vivado™ Design Suite.
  • To illustrate the manual routing feature, precisely control the skew within the output bus of the design, wbOutputData.