Vivado Design Suite Properties Reference Guide (UG912) - 2024.1 English - Documents the properties available for use in the AMD Vivado™ Design Suite. For each property this manual provides a description; supported AMD FPGA devices; applicable logic elements or device resources; accepted values; Verilog, VHDL, and XDC syntax examples; and affected FPGA design flow steps. - UG912

Document ID

UG912

Release Date

2024-06-05

Version

2024.1 English