The fault tolerance features included in MicroBlaze V, enabled with C_FAULT_TOLERANT, provide error detection for internal block RAMs (in the
instruction cache, data cache, branch target cache, and MMU), and support for error
detection and correction (ECC) in LMB block RAMs. When fault tolerance is enabled, all
soft errors in block RAMs are detected and corrected, which significantly reduces
overall failure intensity.
In addition to protecting block RAM, the FPGA configuration memory also generally needs to be protected. A detailed explanation of this topic, and further references, can be found in Soft Error Mitigation Controller LogiCORE IP Product Guide (PG036) and UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187).
To further increase fault tolerance, a complete triple modular redundancy (TMR) solution is provided for MicroBlaze V processors, using additional cores to handle majority voting and fault detection. See the Triple Modular Redundancy (TMR) LogiCORE IP Product Guide (PG268) for a complete description and implementation details.