For more information on mapper and router methodology, see Mapper/Router Methodology in the AI Engine Tools and Flows User Guide (UG1076).
In general, the methodology for mapping/placing the ADF graph onto the AI Engine-ML array remains
similar to AI Engine-ML 1.
You should keep the updated AI Engine-ML 2 architecture in mind (new AXI memory access patterns,
presence of additional memory tile row) while constraining the design. The major change
is that AI Engine-ML 2
does not have DMA FIFOs, and you cannot specify DMA FIFO as a type for fifo_depth() constraints. In addition, you can now specify
location constraints on shared buffers, and external buffer ports.