Measuring Master Performance - 2024.1 English

Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2024-06-19
Version
2024.1 English

By inspecting routes in the NoC view of the Vivado tools, you can infer the routes that connect one or more masters to the memory endpoints that were previously analyzed. If the master performance is adequate, there is likely an issue along the route. If the NoC agent was determined to be below the expected value, there is a confluence effect. For this condition to arise, there must also be another master with lower than expected performance elsewhere in the design.

If, however, the master performance is measured below the expected rate, there is more analysis required to properly identify the root cause.

Note: Excessive interleaving creates dynamic challenges to closing performance. In this case, a strategy for improving NoC performance is to remove interleaving and reduce the number of masters injecting transactions to improve memory insulation.