Settings for the Device Tree Binary Source - Settings for the Device Tree Binary Source - 2024.1 English - UG1186

The PetaLinux reference BSP includes a DTB (Device Tree Binary) for OpenAMP located at:

pre-built/linux/images/openamp.dtb

The device tree setting for the shared memory and the kernel remoteproc is demonstrated in:

project-spec/meta-user/recipes-bsp/device-tree/files/openamp.dtsi

The openamp.dtb and openamp.dtsi files are provided for reference only. You need to edit the system-user.dtsi file to include the content from openamp.dtsi for your project.

The overlay contains nodes that OpenAMP requires in the device tree.

The device tree example is for ZynqMP:

/ {
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		rpu0vdev0vring0: rpu0vdev0vring0@3ed40000 {
			no-map;
			reg = <0x0 0x3ed40000 0x0 0x4000>;
		};
		rpu0vdev0vring1: rpu0vdev0vring1@3ed44000 {
			no-map;
			reg = <0x0 0x3ed44000 0x0 0x4000>;
		};
		rpu0vdev0buffer: rpu0vdev0buffer@3ed48000 {
			no-map;
			reg = <0x0 0x3ed48000 0x0 0x100000>;
		};
		rproc_0_reserved: rproc@3ed00000 {
			no-map;
			reg = <0x0 0x3ed00000 0x0 0x40000>;
		};
	};

	tcm_0a@ffe00000 {
		no-map;
		reg = <0x0 0xffe00000 0x0 0x10000>;
		phandle = <0x40>;
		status = "okay";
		compatible = "mmio-sram";
		power-domain = <&zynqmp_firmware 15>;
	};

	tcm_0b@ffe20000 {
		no-map;
		reg = <0x0 0xffe20000 0x0 0x10000>;
		phandle = <0x41>;
		status = "okay";
		compatible = "mmio-sram";
		power-domain = <&zynqmp_firmware 16>;
	};

	rf5ss@ff9a0000 {
		compatible = "xlnx,zynqmp-r5-remoteproc";
		xlnx,cluster-mode = <1>;
		ranges;
		reg = <0x0 0xFF9A0000 0x0 0x10000>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		r5f_0 {
			compatible = "xilinx,r5f";
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;
			sram = <0x40 0x41>;
			memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
			power-domain = <&zynqmp_firmware 7>;
			mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
			mbox-names = "tx", "rx";
		};
	};

	zynqmp_ipi1 {
		compatible = "xlnx,zynqmp-ipi-mailbox";
		interrupt-parent = <&gic>;
		interrupts = <0 29 4>;
		xlnx,ipi-id = <7>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		/* APU<->RPU0 IPI mailbox controller */
		ipi_mailbox_rpu0: mailbox@ff990600 {
			reg = <0xff990600 0x20>,
				<0xff990620 0x20>,
				<0xff9900c0 0x20>,
				<0xff9900e0 0x20>;
			reg-names = "local_request_region",
					"local_response_region",
					"remote_request_region",
					"remote_response_region";
					#mbox-cells = <1>;
					xlnx,ipi-id = <1>;
		};
	};
};

In the above device tree demo, the OpenAMP in APU uses the PL0 IP integrator instead of the default APU IP integrator for inter-processor notification because the default APU IP integrator has been dedicated to the communication with PMU FW.

For Zynq UltraScale+ MPSoC, you can configure how the Cortex-R5F is operating by setting the core_conf parameter. The current settings works with the demo applications referenced in this document. Libmetal APIs gives a more detailed explanation of those parameters.