Design Elements - 2023.2 English

Vivado Design Suite 7 Series FPGA and Zynq 7000 SoC Libraries Guide (UG953)

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Release Date
2023.2 English

About Design Elements

This section describes the design elements that can be used with 7 series FPGAs and AMD Zynq™ 7000 SoC devices. The design elements are organized alphabetically.

The following information is provided for each design element, where applicable:

  • Name of element
  • Brief description
  • Schematic symbol (if any)
  • Logic table (if any)
  • Port descriptions
  • Design Entry Method
  • Available attributes (if any)
  • Example instantiation templates
  • Related information

Instantiation Templates

Instantiation templates for library elements are also available in AMD Vivado™ , as well as in a downloadable ZIP file. Because PDF includes headers and footers if you copy text that spans pages, you should copy templates from Vivado or the downloaded ZIP file whenever possible.

Instantiation templates can be found on the Web in Instantiation Templates for 7 Series Devices (