Turn Off Cross-Boundary Optimization - 2023.2 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

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2023.2 English

Prohibiting cross-boundary optimization in synthesis prevents additional logic getting pulled into a module. This reduces the complexity of the modules but can also lead to higher overall utilization. This can be done globally with the -flatten_hierarchy none option in synth_design. This same technique can be applied on specific modules with the KEEP_HIERARCHY attribute in RTL.