Selecting the Correct Value for the DEST_SYNC_FF Parameter - 2023.2 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

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2023.2 English

The DEST_SYNC_FF parameter sets the number of metastability protection registers when using an XPM CDC module. The value of this register influences MTBF, design size, and latency at the crossing point. Selecting the correct value of this register is an iterative process that requires the following:

  1. Run the design through the Vivado Design Suite implementation flow.
  2. Based on your targeted device, do one of the following:
    • For 7 series devices, select the default value for DEST_SYNC_FF. This is a conservative approach to meeting typical reliability requirements. For critical designs, conduct further analysis.
    • For UltraScale devices, run the report_synchonizer_mtbf command, which reports the MTBF for the entire design. By iterating through the flow as shown in the following figure, you can find a suitable trade-off between MTBF, latency, and resources.
Note: You can also use this iterative process for a user CDC circuit in which the ASYNC_REG attribute is correctly applied to all the synchronization registers.
Figure 1. Synchronizer MTBF Optimization Flow for UltraScale Device