Reviewing the Design Power Distribution After Running Power Analysis - 2023.2 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2023-11-29
Version
2023.2 English

You can review the total on-chip power and thermal properties as well as details of the power at the resource level to determine which parts of your design contribute most to the total power. For more information, see this link in the Vivado Design Suite User Guide: Power Analysis and Optimization (UG907).

Power Tip: Review and validate the decoupling requirement of the completed Vivado design against the current schematic/PCB. You can generate a .xpe file from Vivado tools report_power using the following Tcl commands:
set_operating_conditions -process maximum
set_operating_conditions -ambient_temp <max Ambient requested for
application is Celsius>
set_operating_conditions -thetaja <the rise in junction temperature for
every watt dissipated, obtained from thermal simulation, C/W>
report_power -xpe {C:/Design_Runs/Vivado_export.xpe} -name {Any_Name}
You can then import the .xpe file into Xilinx Power Estimator (XPE) spreadsheet tool (download at www.xilinx.com/power). For example, the Power Delivery sheet shows the decoupling requirement based on the power estimation and power delivery option.