Best Practices for Accurate Power Analysis - 2023.2 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

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2023.2 English

For accurate power analysis, make sure you have accurate timing constraints, I/O constraints, and switching activity. The report_power command indicates a confidence level, as shown in the following figure. Target a High confidence level to ensure accurate power analysis. For more information, see this link in the Vivado Design Suite User Guide: Power Analysis and Optimization (UG907).

Figure 1. Power Analysis Confidence Level