Because you modified the source files associated with the design, you must recompile the HDL source and build a new simulation snapshot. Do not just restart the simulation at time 0 in this case but rebuild the simulation from scratch.
- In sinegen.vhd, select one of the breakpoints, right-click, and select Delete All Breakpoints.
- Click the Relaunch button
on the main toolbar menu.Note: If prompted to save the Wave Config file, click yes.The AMD Vivado™ simulator recompiles the source files with
xelaband re-creates the simulation snapshot. Now you are ready to simulate with the corrected design files. The relaunch button will be active only after one successful run of Vivado Simulator using launch_simulation. If you run the simulation in a Batch/Scripted mode, the relaunch button would be grayed out. - Click the Run All button
to run
the simulation.Observe the
sine[19:0], the analog signal in the waveform configuration. The low frequency sine wave looks as expected. The Tcl console results are:[@3518000] LEDS_n = 0100 [@3523000] LEDS_n = 0001 [@3523000] LEDS_n = 0001 [@6008000] LEDS_n = 0101 [@6013000] LEDS_n = 0010 [@6013000] LEDS_n = 0010 $finish called at time : 7005 ns : File "ug937/sim/testbench.v" Line 63