Floorplanning Visualization - 2023.2 English

Floorplanning Visualization - 2023.2 English - UG909

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID

UG909

Release Date

2023-11-15

Version

2023.2 English

In the DFX flow for Versal devices, you can visualize the placement and routing footprints using the get_dfx_footprint command, which offers the following benefits:

Faster visualization of DFX components (by up to tens of minutes when compared with the hd_visual commands)
Floorplanning DRC analysis
Guide generation for supported floorplanning of multi-RPs and RPs with disjoint Pblocks

The get_dfx_footprint command returns tile, site, and cell objects, which can be used in create_pblock and resize_pblock commands to create valid reconfigurable Pblocks. You must define the reconfigurable Pblock before executing the command. Enter get_dfx_footprint -help in theVivado Design Suite Tcl console to get details of the command.

The following table lists the supported command arguments and usage for the get_dfx_footprint command.

Table 1. get_dfx_footprint Command Options
Option	Usage
`-of_objects`	Returns objects associated with specified reconfigurable module or device tiles and accepts one object as input. Note: This option is dependent on the argument passed. Most of the arguments take the reconfigurable module (RM) cell name as a valid value for `-of_objects`.
`-place`	Returns the tiles that are included in the placement footprint of a reconfigurable module specified by `-of_objects`.
`-route`	Returns the tiles that are included in the routing footprint of a reconfigurable module specified by `-of_objects`.
`-pu`	Returns the tiles included in programmable unit (PU) that are the minimum required resource set for partial reconfiguration for the tile specified by `-of_objects`.
`-frame`	Returns the tiles included in a frame of the given tile specified by `-of_objects`. A reconfigurable frame is the smallest sized physical region that can be reconfigured and aligns with clock region boundaries.
`-half_frame`	Returns the tiles included in a half frame of the given tile specified by `-of_objects`. A reconfigurable frame is the smallest sized physical region that can be reconfigured and aligns with clock region boundaries. A half frame aligns with half of the clock region boundary.
`-site_type`	Returns the sites types specified for the value and takes the reconfigurable module cell name in `-of_objects`. Following are the valid values: `* hsr`: Returns the valid sites of the horizontal super region that needs to be part of the reconfigurable Pblock of the reconfigurable- module specified by`-of_objects`. `* fsr`: Returns the valid sites of the fabric logic region that needs to be part of the reconfigurable Pblock of the reconfigurable module specified by`-of_objects`. `* fsr_hsr`: Returns the valid sites of horizontal super region and adjoined fabric logic region that needs to be part of the reconfigurable Pblock of the reconfigurable module specified by `-of_objects`. The clock sources needs to be placed in the HSR, and the clock control logic needs to be placed in this adjoined fabric logic region in case of a disjoint Pblock. Note: The `-site_type` option is only used for disjoint Pblocks. This option is disabled for non-disjoint Pblocks and does not return any objects.
`-cell_type`	Returns the cell types specified for the value. The cells are associated with the reconfigurable module specified by `-of_objects`. Following are the valid values: `* non_clock`: Returns list of cells that need to be placed in the fabric logic region. `* clock`: Returns list of clock type cells that need to be placed in the HSR. `* clock_control`: Returns list of cells that are part of the clock control logic and need to be placed in the fabric logic region above the HSR where the source clock cells are placed. Note: The `-cell_type` option is only used for disjoint Pblocks. This option is disabled for non-disjoint Pblocks and does not return any objects.
`-overlap`	Returns the overlapping tiles of the routing footprint for the reconfigurable module specified by `-of_objects`. This argument can be used to get the tiles that are part of multiple reconfigurable Pblocks in a DFX design that might lead to DRC errors. It also includes the sharable tiles.
`-shared`	Returns the tiles for the reconfigurable module specified by `-of_objects` that can be shared with another reconfigurable Pblock. This lists all shared clocking tiles of the specified RM cell.

Floorplanning Visualization Examples

The following example gets the programmable unit (PU) of a CLE_E_CORE tile:

get_dfx_footprint -pu -of_objects [get_tiles CLE_E_CORE_X27Y4]

The following example highlights the overlapping tiles of the RM cell design_0_i/rp1_rm1:

highlight_objects -color yellow [get_dfx_footprint -overlap -of_objects [get_cells design_0_i/rp1_rm1]]

The following example highlights the routing footprint of a disjoint Pblock.

highlight_objects -color green [get_dfx_footprint -route -of_objects [get_cells design_0_i/bramctrl_rm]]

In the following figure, the green highlighted tiles show the routing footprint of a disjoint Pblock.

Figure 1. Disjoint Pblock Routing Footprint

You can use the get_dfx_footprint command to assign the valid cells to the child Pblock of a disjoint Pblock. In the following example pblock_bramctrl_rm is the parent Pblock that is disjoint, and pblock_bramctrl_rm_child is the child Pblock. The design has clock control logic that needs to be placed in the extended fabric region near the clock source. The rest of the logic needs to be placed in the remote upper region. The following figure shows the disjoint Pblock Device view and the parent Pblock Properties window, which indicate that RM cells are assigned to the parent Pblock. All non-clock cells must be assigned to child Pblocks.

Figure 2. Parent Pblock of Disjoint Pblock in Device View and Physical Properties Window

You can use the get_dfx_footprint command to fetch all the cells that must be placed in the pblock_bramctrl_rm_child child Pblock of the disjoint Pblock. Following is an example;

set rm_cell [get_cells design_0_i/bramctrl_rm]
    set fsr_tiles [get_dfx_footprint -of $rm_cell -site_type fsr]
    set non_clock_cells [get_dfx_footprint -of $rm_cell -cell_type non_clock]
    resize_pblock [get_pblock pblock_bramctrl_rm_child] -add $fsr_tiles
    # Add sites and cells to child pblock
    add_cells_to_pblock [get_pblocks rp_child_pblock] $non_clock_cells -clear_locs

After executing these Tcl commands, the non-clock cells of the RM are assigned to the child Pblock, and the clock cells and the clock control logic remain assigned to the parent Pblock. The following figure shows the distribution of the assigned cells between the parent and child Pblocks.

Figure 3. Distribution of Cells Between Parent and Child Pblocks in Parent Pblock Properties Window