You can open the AMD Vivado™ Design Suite Hardware Manager to download your design bitstream to a device. Use the Vivado logic analyzer and Vivado serial I/O analyzer features of the Hardware Manager to debug your design. For example, you can add ILA, VIO, and JTAG-to-AXI cores to your design for debugging in the Vivado logic analyzer or use the IBERT example design from the AMD IP catalog to test and configure the GTs in your design with the Vivado serial I/O analyzer.