TIMING-54: Scoped False Path, Clock Group, or Max Delay Datapath Only Constraint between Clocks - 2023.2 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

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2023.2 English

A scoped <message_string> timing constraint is set between clocks <clock_group> and <clock_group> (see the constraint position <message_string> in the Timing Constraint window in the Vivado IDE). It is not recommended to define such scoped constraints between clocks because the constraint impacts timing paths outside of the scope.