Reporting the Ignored Objects - 2023.2 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

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2023.2 English

The Report Exception command can generate a list of invalid startpoints and endpoints for each of the timing exception constraints. Invalid startpoints and endpoints are ignored by the Vivado tool because timing paths can neither originate from those startpoints nor end on those endpoints. The ignored pins are reported by report_exceptions -ignored_objects.

Note: Invalid startpoints and endpoints with a Max Delay or Min Delay constraint are not ignored but result in path segmentation.
Note: Startpoint or endpoint pins tied to POWER or GROUND are reported in the list of ignored objects.

To illustrate, set the following timing constraints on the small example design:

create_clock -period 10.000 -name clk [get_ports clk]
set_false_path -from [get_cells int10_reg] -to [get_cells int20_reg]
set_false_path -from [get_pins int11_reg/*] -to [get_pins int21_reg/*]
Note: When the second False Path constraint is entered, the Vivado tool generates Warning Constraints 18-402 because some startpoints and endpoints are invalid.

WARNING: [Constraints 18-402] set_false_path: 'int11_reg/CE' is not a valid startpoint.

Resolution: A valid start point is a main or generated clock pin or port, a clock pin of a sequential cell, or a primary input or inout port. Please validate that all the objects returned by your query belong to this list.

  • The first set_false_path constraint uses the get_cells command. The Vivado tool converts the cell(s) from get_cells into pins using only valid startpoint or endpoint pins. This ensures that the constraint refers only to valid objects.
  • The second set_false_path constraint uses the get_pins command and forces all the register pins for -from and -to. This results in several invalid pins for both -from and -to.

The following figure shows the report from report_exceptions -ignored_objects.

Figure 1. Ignored Objects