Constraint Files Order with IP Cores - 2023.2 English

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2023-11-01
Version
2023.2 English

Many IP cores are delivered with one or more XDC files. When such IP cores are generated within your RTL project, their XDC files are also used during the various design compilation steps.

For example, the following figure shows that one of the IP cores in the project comes with an XDC file.

Figure 1. XDC Files in the IP Sources

By default, IP XDC files are read in before the user XDC files. Processing it in this way allows an IP to create a clock object that can be referenced in the XDC. It also allows you to overwrite physical constraints set by an IP core because the user constraints are evaluated after the IP. There is an exception to this order for the IP cores that have a dependency on clock objects being created by the user or by another IP (for example, get_clocks -of_objects [get_ports clka]). In this case, the IP XDC is read after the user files.

This behavior is controlled by the PROCESSING_ORDER property, set for each XDC file:

  • EARLY: Files that must be read first
  • NORMAL: Default
  • LATE: Files that must be read last

An IP XDC has its PROCESSING_ORDER property set to either EARLY or LATE. No IP delivers XDC files that belong to the NORMAL constraints group. For user XDC (or Tcl) files that belong to the same PROCESSING_ORDER group, their relative order displayed in the Vivado IDE determines their read sequence. The order within the group can be modified by moving the files in the Vivado IDE constraints set, or by using the reorder_files command.

For IP XDC files that belong to the same PROCESSING_ORDER group, the order is determined by import or creation sequence of the IP cores. This order cannot be changed after the project has been created.

Finally, the relative order between user groups and IP XDC PROCESSING_ORDER groups are as follows:

  1. User Constraints marked as EARLY
  2. IP Constraints marked as EARLY (default)
  3. User Constraints marked as NORMAL
  4. IP Constraints marked as LATE (contain clock dependencies)
  5. User Constraints marked as LATE
Note: IP XDC files that have their PROCESSING_ORDER set to LATE (in order to be processed after the user constraints) are named <IP_NAME>_clocks.xdc.

The following figure shows an example of how to set the PROCESSING_ORDER property:

Figure 2. Setting the XDC File PROCESSING_ORDER Example

The equivalent Tcl command is:

set_property PROCESSING_ORDER EARLY [get_files wave_gen_pins.xdc]
Note: When an IP is synthesized Out of Context, the IP provides, when needed, an _ooc.xdc file that contains the default clock definition. The _ooc.xdc has the USED_IN property set to "synthesis out_of_context implementation" (order does not matter). During the Out Of Context synthesis, the _ooc file is always processed before all other constraints.