The UNIFAST library is an optional library that you can use during RTL behavioral simulation to speed up simulation runtime.
Important: The UNIFAST library is an optional library that you can use
during functional simulation to speed up simulation runtime. UNIFAST libraries are
supported for 7 series devices only. UltraScale and later device architectures do not support UNIFAST libraries, as all the
optimizations are incorporated in the UNISIM libraries by default. UNIFAST libraries
cannot be used for sign-off simulations because the library components do not have
all the checks/features that are available in a full model.
Recommended: Use the UNIFAST library for initial verification of the design
and then run a complete verification using the UNISIM library.
The simulation runtime improvement is achieved by supporting a subset of the primitive features in the simulation mode.
Note: The simulation models check for unsupported attribute values only.
MMCME2
To reduce the simulation runtimes, the fast MMCME2 simulation model has the following changes from the full model:
- The fast simulation model provides only basic clock generation functions. Other functions, such as DRP, fine phase shifting, clock stopped, and clock cascade are not supported.
- It assumes that the input clock is stable without frequency and phase change. The input clock frequency sampling stops after the LOCKED signal is asserted HIGH.
- The output clock frequency, phase, duty cycle, and other
features are directly calculated from the input clock frequency and parameter
settings. Note: The output clock frequency is not generated from input-to-VCO clock.
- The standard and the fast MMCME2 simulation model LOCKED signal assertion times
differ.
- Standard Model LOCKED assertion time depends on the M and D setting. For large M and D values, the lock time is relatively long for a standard MMCME2 simulation model.
- In the fast simulation model, the LOCKED assertion time is shortened.
DSP48E1
To reduce the simulation runtimes, the fast DSP48E1 simulation model has the following features removed from the full model.
- Pattern Detection
- OverFlow/UnderFlow
- DRP interface support
GTHE2_CHANNEL/GTHE2_COMMON
To reduce the simulation runtimes, the fast GTHE2 simulation model has the following feature differences:
- GTH links must be synchronous with no Parts Per Million (PPM) rate differences between the near and far-end link partners.
- Latency through the GTH is not cycle-accurate with the hardware operation.
- You cannot simulate the DRP production reset sequence. Bypass it when using the UNIFAST model.