SystemC Support in Vivado IDE - 2023.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

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2023.2 English

AMD Vivado™ Design Suite provides simulation models as a set of files and libraries. Simulation libraries contain the device and IP behavioral and timing models. The compiled libraries can be used by multiple design projects. You must compile these files prior to design simulation through a utility called compile_simlib to compile the simulation models for the target simulator. This utility can be invoked from the Vivado IDE or by executing it from the Tcl Console.

For SystemC simulation verification, simulation models are provided in C/C++/SystemC. Vivado Design Suite provides two sets of simulation models:

  • Protected models
  • Unprotected models
Note: With Vivado simulator, there is no need to compile the simulation libraries. Libraries must generally be compiled or recompiled with a new software release to update simulation models and to support a new version of the simulator and GCC.