Scope Window - 2023.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

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2023.2 English

A scope is a hierarchical partition of an HDL design. Whenever you instantiate a design unit or define a process, block, package, or subprogram, you create a scope.

In the Scope window (shown in the following figure), you can see the design hierarchy. When you select a scope in the Scope window, all HDL objects visible from that scope appear in the Objects window. You can select HDL objects in the Objects window and add them to the waveform viewer.

Figure 1. Scope Window

Filtering Scopes

  • Click Settings option on the scopes sub-menu to toggle between showing or hiding (check or uncheck) the corresponding scope type.
    Tip: When you hide a scope using Setting option, all scopes inside that scope are also hidden regardless of type. For example, in the preceding figure, clicking the Verilog Module button to hide all Verilog module scopes hides not only the bft_tb scope but also uut (even though uut is a VHDL entity scope).
  • To limit the display to scopes containing a specified string, click the Search button and type the string in the text box.

The objects displayed in the Objects window change (or are filtered) based on the current scope. Select the current scope to change the objects in the Objects window.

When you right-click a scope, a menu (shown in the following figure) appears with the following options:

Figure 2. Scope Window Options

  • Add to Wave Window: Adds all viewable HDL objects of the selected scope to the waveform configuration.
    Tip: HDL objects of large bit width can slow down the display of the waveform viewer. You can filter out such objects by setting a display limit on the wave configuration before issuing the Add to Wave Window command. To set a display limit, use the Tcl command set_property DISPLAY_LIMIT <maximum bit width> [current_wave_config].

    The Add to Wave Window command might add a different set of HDL objects from the set displayed in the Objects window. When you select a scope in the Scope window, the Objects window might display HDL objects from enclosing scopes in addition to objects defined directly in the selected scope. The Add to Wave Window command, on the other hand, adds objects from the selected scope only.

    Alternately, you can drag and drop items in the Objects window into the Name column of the Wave window.

    Important: The Wave window displays the value changes of an object over time, starting from the simulation time at which the object was added.
    Tip: To display object values prior to the time of insertion, the simulation must be restarted. To avoid restarting the simulation because of missing value changes, issue the log_wave -r / Tcl command at the start of a simulation run to capture value changes for all display-able HDL objects in your design. For more information, see Using the log_wave Tcl Command.

    Changes to the waveform configuration, including creating the waveform configuration or adding HDL objects, do not become permanent until you save the WCFG file.

  • Go To Source Code: Opens the source code at the definition of the selected scope.
  • Go To Instantiation Source Code: For Verilog modules and VHDL entity instances, opens the source code at the point of instantiation for the selected instance.
  • Set Current Scope to Active: Set the current scope to selected scope. The selected scope becomes the active simulation scope (that is, get_property active_scope [current_sim]). The active simulation scope is the HDL process scope, where the simulation is currently paused. When used by disabling the follow active scope in setting, Vivado simulator remembers the last current_scope selection even when simulation proceeds. When a breakpoint is hit, current_scope still points to the last scope, which is set as active scope.
  • Log to Wave Database: You can log either of the following:
    • The objects of current scope.
    • The objects of the current scope and all scope below the current scope.
    Tip: By default, the Vivado simulator suppresses the logging of large HDL objects. To change the size limit of logged objects, use the set_property trace_limit <size> [current_sim] Tcl command, where <size> is the number of scalar elements in the HDL object.

    In the source code text editor, you can hover over an identifier in the code to get the value, as shown in Scope Window.

    Important: For this feature to work, make sure that you have the scope associated with the source code selected in the Scope window.
    Tip: Because the top module is not instantiated, the Go to Instantiation Source Code right-click option (shown in the preceding figure) is grayed out when the top module is selected.
    Tip: Use log_wave to log the objects of current scope or below. Post simulation, you can add any objects on the waveform and see the plot starting from time 0 till the current simulation.
    Figure 3. Source Code with Identifier Value Displayed

Additional Scopes and Sources Options

In either the Scope or the Sources window, a search field displays when you select the Show Search button .

As an equivalent to using the Scope and Objects windows, you can navigate the HDL design by typing the following in the Tcl Console:

Tip: To access source files for editing, you can open files from the Scope or Objects window by selecting Go to Source Code, as shown in Scope Window.
Figure 4. Context Menu in Scope Window

Tip: After you have edited source code and saved the file, you can click the Relaunch button to recompile and relaunch simulation without having to close and reopen the simulation.