Compiling Simulation Libraries - 2023.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

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2023.2 English
Important: With Vivado simulator, there is no need to compile the simulation libraries. However, you must compile the libraries when using a third-party simulator.

The Vivado Design Suite provides simulation models as a set of files and libraries. Your simulation tool must compile these files prior to design simulation. The simulation libraries contain the device and IP behavioral and timing models. The compiled libraries can be used by multiple design projects.

During the compilation process, Vivado creates a default initialization file that simulator uses to reference the compiled libraries. The compile_simlib command creates the file in the library output directory specified during library compilation. The default initialization file contains control variables that specify reference library paths, optimization, compiler, and simulator settings. If the correct initialization file is not found in the path, you cannot run simulation on designs that include AMD primitives.

The name of the initialization file varies depending on the simulator you are using, as follows:

  • Questa Advanced Simulator/ModelSim: modelsim.ini
  • Xcelium: cds.lib
  • VCS: synopsys_sim.setup
  • Riviera/Active-HDL: library.cfg

For more information on the simulator-specific compiled library file, see the 3rd party simulation tool documentation.

Important: Compilation of the libraries is typically a one-time operation, as long as you are using the same version of tools. However, any change to the Vivado tools or the simulator versions requires that libraries be recompiled.

You can compile libraries using the Vivado IDE or using Tcl commands, as described in the following sections.