High-Speed I/O Planning for Versal Adaptive SoC - 2023.2 English

Vivado Design Suite User Guide: I/O and Clock Planning (UG899)

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2023.2 English

The AMD Vivado™ tool flow for AMD Versal™ devices introduces the Advanced IO Wizard, an IP-based flow for creating and planning high speed SelectIO™ interfaces. For more information on SelectIO XPHY logic implementation using the Advanced IO Wizard refer to the Advanced IO Wizard Tutorial in Advanced I/O Wizard LogiCORE IP Product Guide (PG320). This section is an overview of how to access the Advanced IO planner using an Advanced IO Wizard example design.

The I/O Planning view includes the I/O Ports and Package Pins window. This tool only allows for nibble and bank-level granularity. If more granularity is required, use the classic pin planning tools. If the Versal architecture Advanced IO Wizard IP exists in the design, the banners of both tabs contain a message and a button to launch the Advanced I/O Planner. The Advanced I/O Planner understands any interface in the XPHY I/O block. If there is a hard or soft memory controller, it also appears in the Advanced I/O Planner. The placement of these interfaces is arranged based on a centralized hardware rule-based engine. There is a priority to this list such as hard memory controller, soft memory controller, followed by any SelectIO interface. You can use the Advanced I/O planner to either automatically or manually assign IP interface signal groups to specific nibble groups within the I/O banks. For more information on Advanced IO Planner, see the Using Advanced I/O Planner section of Advanced I/O Wizard LogiCORE IP Product Guide (PG320).