Different Types of Projects - 2023.2 English

Vivado Design Suite User Guide: Design Flows Overview (UG892)

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2023.2 English

The Vivado Design Suite allows for different design entry points depending on your source file types and design tasks. Following are the different types of projects you can use to facilitate those tasks:

RTL Project
You can add RTL source files and constraints, configure IP with the Vivado IP catalog, create IP subsystems with the Vivado IP integrator, synthesize and implement the design, and perform design planning and analysis.
Post-Synthesis Project
You can import third-party netlists, implement the design, and perform design planning and analysis.
I/O Planning Project
You can create an empty project for use with early I/O planning and device exploration prior to having RTL sources.
Imported Project
You can import existing project sources from the ISE Design Suite, Xilinx Synthesis Technology (XST), or Synopsys Synplify.
Example Project
You can explore several example projects, including example AMD Zynq™ 7000 SoC or MicroBlaze™ embedded designs with available AMD evaluation boards.
You can dynamically reconfigure an operating FPGA design by loading a partial bitstream file to modify reconfigurable regions of the device.