Config Flow
Syntax
config_flows [‑mark_debug <arg>] [‑quiet] [‑verbose]Usage
| Name | Description |
|---|---|
[-mark_debug]
|
Allows nets with MARK_DEBUG to be optimized instead of preserved. |
[-quiet]
|
Ignore command errors |
[-verbose]
|
Suspend message limits during command execution |
Categories
Description
This command configures tool behavior, it spans multiple stages of the Vivado core design flow, from IP integrator to bitstream generation. The user selection affects synthesis, constraints, and HW debug.
Arguments
-mark_debug - (Optional) Allow nets with MARK_DEBUG to be optimized
instead of preserved. This includes both HDL attributes and XDC constraints. This
setting makes it easier to move into and out of design debug phases. The setting
must be applied before opening and launching design runs or before opening design
checkpoints. Three values are supported:
enable - Do not optimize MARK_DEBUG nets. This is default value.
disable - Allow both synthesis and implementation to freely optimize
MARK_DEBUG nets.
synthesis_only - Synthesis will not optimize MARK_DEBUG nets so that
they are available at the beginning of implementation, but MARK_DEBUG nets can be
freely optimized during implementation.