Object Types and Definitions - 2023.2 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

Document ID
Release Date
2023.2 English
There are many object types in the Vivado Design Suite; this chapter provides definitions and explanations of the basic types. The most basic and important object types are associated with entities in a design netlist, and these types are listed in the following subsections:
A cell is an instance, either primitive or hierarchical inside a netlist. Examples of cells include flip-flops, LUTs, I/O buffers, RAM and DSPs, as well as hierarchical instances which are wrappers for other groups of cells.
A pin is a point of logical connectivity on a cell. A pin allows the internals of a cell to be abstracted away and simplified for easier use, and can either be on hierarchical or primitive cells. Examples of pins include clock, data, reset, and output pins of a flop.
A port is a connection at an object boundary used to connect internal content to the outside of the object. Ports in the top-level netlist or design are normally attached to I/O pads on the die, connected to pins on the device package, and connected externally to the device in a system-level design. Ports inside of a hierarchical cell, module, or entity, are represented as pins on the hierarchical cell.
A net is a wire or list of wires that eventually be physically connected directly together. Nets can be hierarchical or flat, but always sorts a list of pins together.
A clock is a periodic signal that propagates to sequential logic within a design. Clocks can be primary clock domains or generated by clock primitives such as a DCM, PLL, or MMCM. A clock is the rough equivalent to a TIMESPEC PERIOD constraint in UCF and forms the basis of static timing analysis algorithms.