Creating Clocks - 2023.2 English

Power Design Manager User Guide (UG1556)

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2023.2 English

The clocks must be created or generated before starting a manual estimation flow. This enables the clocks to be selected in other pages.

This clock creation can be performed using the Clock wizard from the Clock page.

The PDM tool has a create clock wizard to create clocks. This wizard allows creating internal clocks coming from another block, such as PS or GT as well as external clocks from primary inputs.

Fill in the details in the Create Clock Wizard to create a clock. Select an external or internal clock, from another block, such as the processing subsystem (PS), or a GT recovered clock.

Figure 1. Creating Clock Wizard
Figure 2. Clock Wizard

Figure 3. Clock Table

Fanout for each clock is calculated from totaling its loads from the other resource pages where it is used. This ensures the clock fanout is accurate and updated with changes in resource totals.

Power Tip: Using this approach for the clock entry, PDM can accurately estimate the clock power, as the clock fanout is updated every time a clock is used in a Resources page.

For clock gating and frequency scaling, refer to PL Power Management.

If power estimation is required for a MMCM or PLL, you can specify these in the Clock Managers section on the Clock page.

You can configure Clock Managers, MMCM, XPLL, DPLL from the clock wizard. PDM automatically creates unique instance names for different clock managers. You can specify the reference clock for clock managers by selecting the previously created clocks. If the reference clock is not explicitly specified, then, the current external/internal clock in the clock configuration wizard is used as the reference clock for the given clock manager. Clock wizard allows selecting three different VCO ranges for clock managers. VCO range is used to identify the optimum D and M values for PLLs.

Figure 4. Clock Managers

Once the clock is created, it is available in the Clock table and is selectable on the other resource pages such as Logic, DSP, URAM, block RAM, and I/O to estimate the power of these blocks and the power of the clock network.