Configuration - 2023.2 English

Power Design Manager User Guide (UG1556)

Document ID
UG1556
Release Date
2023-10-18
Version
2023.2 English

The Configuration table allows you to specify these device configuration features:

Figure 1. Configuration Table

Readback CRC Clock (MHz)

AMD UltraScale+ devices include a feature to do continuous readback of configuration data in the background of a user design. This feature is aimed at simplifying detection of Single Event Upsets (SEUs) that cause a configuration memory bit to flip and can be used with the FRAME ECC feature for advanced operations such as SEU corrections. In the Configuration table, enter the ReadBack CRC Clock frequency to include this feature in the PDM power estimate. Leave this blank if your design does not use the Readback CRC feature.

Readback CRC is described in the UltraScale Architecture Configuration User Guide (UG570).

Configuration Bank Voltage

Specifies the setting of the Configuration Bank Voltage Select (CFGBVS), which determines the I/O voltage operating range and voltage tolerance for the configuration-related I/O banks in the device. Configuration bank voltage is described in the UltraScale Architecture Configuration User Guide (UG570).