CPM5 - 2023.2 English

Power Design Manager User Guide (UG1556)

Document ID
UG1556
Release Date
2023-10-18
Version
2023.2 English

CPM5 contains Type-A Gen-5 PCIe® controllers and two DMA controllers. CPM5 also contains the necessary hardened components to allow a fabric accelerator to act as a CCIX accelerator over the PCIe transport. Like CPM, CPM5 subsystem power is estimated based on the number of controllers used and respective PCIe configuration. The controller supports Gen1, Gen2, Gen3, Gen4, and Gen5 PCIe modes, up to x16 lanes (not all lane speed support x16 lane width). It also supports a CCIX only ESM mode (20 or 25 Gbps). In PDM, both PCIe Core A0 and A1 can be configured separately. There are four different modes supported for CPM based on its usage models. The modes are as follows:

  • CCIX
  • CCIX_L2 - (L2 cache)
  • PCIE_Controller_Only
  • PCIE_Controller_DMA/Bridge
Figure 1. Create Hard IP Wizard

Figure 2. CPM5