Zynq UltraScale+ MPSoC Boot and Configuration - 2023.2 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

Document ID
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2023.2 English


AMD Zynq™ UltraScale+™ MPSoC supports the ability to boot from different devices such as a QSPI flash, an SD card, USB device firmware upgrade (DFU) host, and the NAND flash drive. This chapter details the boot-up process using different booting devices in both secure and non-secure modes. The boot-up process is managed and carried out by the Platform Management Unit (PMU) and Configuration Security Unit (CSU).

During initial boot, the following steps occur:

  • The PMU is brought out of reset by the power on reset (POR).
  • The PMU executes code from PMU ROM.
  • The PMU initializes the SYSMON and required PLLs for the boot, clears the low power and full power domains, and releases the CSU reset.

After the PMU releases the CSU, CSU does the following:

  • Checks to determine if authentication is required by the FSBL or the user application.
  • Performs an authentication check and proceeds only if the authentication check passes. Then checks the image for any encrypted partitions.
  • If the CSU detects partitions that are encrypted, the CSU performs decryption and initializes OCM, determines boot mode settings, performs the FSBL load and an optional PMU firmware load.
  • After execution of CSU ROM code, it hands off control to FSBL. FSBL uses PCAP interface to program the PL with bitstream.

FSBL then takes the responsibility of the system. The Zynq UltraScale+ Device Technical Reference Manual (UG1085) provides details on CSU and PMU. For specific information on CSU, see "Configuration Security Unit" in the Zynq UltraScale+ MPSoC: Software Developers Guide (UG1137).