Zynq 7000 SoC Register Initialization Table - 2023.2 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

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2023.2 English

The Register Initialization Table in Bootgen is a structure of 256 address-value pairs used to initialize PS registers for MIO multiplexer and flash clocks. For more information, see About Register Intialization Pairs and INT File Attributes.

Table 1. Zynq 7000 SoC Register Initialization Table
Address Offset Parameter Description
0xA0 to 0x89C Register Initialization Pairs: <address>:<value>: Address = 0xFFFFFFFF means skip that register and ignore the value.

All the unused register fields must be set to Address=0xFFFFFFFF and value = 0x0.