M_AXI Channels - 2023.2 English

Vitis High-Level Synthesis User Guide (UG1399)

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2023.2 English

M_AXI channels implement a separate channel for each pointer argument mapped to a single AXI interface, rather than requiring a separate adapter.

Figure 1. Maxi Adapter

This enables the following benefits:

  • The kernel uses fewer M_AXI adapters and consumes fewer hardware resources.
  • Multiple pointer arguments mapped to a single AXI interface can be used inside a dataflow region.
  • Using a unique AXI ID for each pointer argument enables burst interleaving which can result in higher utilization of the AXI bus bandwidth.

There are two methods to enable this feature in your design:

  • Enable globally on m_axi interfaces using the syn.interface.m_axi_auto_id_channel=true configuration command as described in Interface Configuration. The HLS tool automatically adds channels to the m_axi adapter when this is enabled.
  • Enable on a specific m_axi interface using the channel option of the INTERFACE pragma or directive as described in syn.directive.interface