The Vitis target platforms can be customized with unique hardware and software components. There are two general types of platforms: fixed platforms and extensible platforms. Fixed platforms support embedded software development and are a direct analog to the hardware definition file that was previously used for software development with the AMD SDK tool. Extensible platforms support the application acceleration development flow, and includes hardware for supporting acceleration kernels, controlling AI Engine for AMD Versal™ adaptive SoC, and software for a target running Linux and the Xilinx Runtime (XRT) library. For more information on the XRT library, see https://github.com/Xilinx/XRT.
The following figure shows the traditional SDK flow for embedded software application development. An AMD Hardware Design File (HDF) is exported from the AMD Vivado™ Design Suite. It is used by SDK for board support package (BSP) generation and creating software applications that apply the BSP.
The following figure shows the Vitis embedded software development flow that replaces the SDK flow beginning with the 2019.2 release. The hardware specification is now contained in the Xilinx Support Archive (XSA) and is exported from a Vivado design, but is formatted differently from HDF and uses the .xsa file name extension.
The Vitis core tools create a platform, BSP, and software boot components such as the FSBL and PMU firmware for the fixed-XSA, and are associated with the Vitis platform. Software applications targeting the fixed-platform can be developed with the Vitis Embedded Software Development flow. Fixed-platforms are not limited to Linux and the XRT library, but can also target processor domains running Baremetal and RTOS operating systems as well. See the Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400) for more information.
In the Vitis Application Acceleration Development flow, the Vivado Design Suite is used create an extensible-XSA, containing additional IP blocks and metadata to support kernel connectivity. The following figure shows the acceleration software development flow.
The following figure shows the Vitis
embedded software development flow that use common image and the
createdts command to generate software components and leverage
PetaLinux as an alternative beginning with the 2022.1 release.
In the Vitis Application Acceleration
Development flow, the Vivado Design Suite is also used
to generate and write an extensible-XSA, containing additional IP blocks and metadata to
support kernel connectivity. You start with a common image and
createdts to generate the DTS for software components and use
PetaLinux as an alternative. The following figure shows the acceleration software
development flow beginning with the 2022.1 release.
The Vitis core tool supports application development in multiple languages ( OpenCL™ , C, C++) but the applications must target a Vitis platform. A target platform consists of hardware and software components as shown in the following figure. The target platform view on the left side of the page is for the Vitis embedded software development flow, whereas the right side of page shows a platform that supports acceleration kernels. The differences include acceleration kernel requirements of a target with Linux + XRT, metadata, and kernel interface declarations.
