Generating Test Vectors for Vitis HLS during Hardware Emulation - 2023.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
Release Date
2023-12-13
Version
2023.2 English

Now it is possible to instruct the Vitis tool to generate test vectors for simulation during hardware emulation, without re-running v++ compilation and linking. The test vectors will enable Vitis HLS to run C/RTL Co-simulation without a dedicated C++ test bench for:

  • deadlock analysis
  • FIFO depth optimization
  • other performance optimizations

Use the following steps:

  1. Create an hlsPre.tcl file and insert this command:
    config_export -cosim_trace_generation
  2. Run v++ --compile and keep the HLS project directories, under the <compile_dir>
  3. Run v++ --link --target hw_emu
  4. Run the application for hardware emulation
  5. Locate the hls_cosim inside the HW_EMU run directory
    1. This directory contains one directory for each kernel, with one directory for each kernel CU (kernel instance) below it:
      <build_dir>/.run/<run_number>/hw_em/device0/binary_0/behav_waveform/xsim/hls_cosim/<kernel_name>
  6. Copy the appropriate kernel directory to the HLS project directory, i.e.:
    cp -r <build_dir>/.run/<run_number>/.../xsim/hls_cosim/<kernel_name> <compile_dir>/<kernel_name>/<kernel_name>
  7. Open the Vitis HLS tool and run C/RTL Co-simulation in batch mode or GUI mode:
    cosim_design -hwemu_trace_dir <kernel_name>/<instance_name> ...

The traces generated from HW_EMU are valid only as long as:

  • The functionality of the kernel does not change
  • The top interface of the kernel does not change
  • The number of top interface reads and writes (s_axilite registers, m_axi interfaces, axis interfaces) does not change.