Using IBERT GTY, GTYP, and GTM for Transceiver Link Characterization - 2023.2 English

Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388)

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2023.2 English

Versal device GTY, GTYP, and GTM transceivers support an Integrated Bit Error Ratio Tester (IBERT) which enables in-system serial I/O validation and debug. This allows the measuring and optimization of high-speed serial I/O links.

IBERT should be used when you are interested in measuring the quality of a signal after receiver equalization has been applied to the received signal.

Unlike previous architectures, the Versal device IBERT functionality is integrated into the GTY, GTYP, and GTM transceivers and requires only a design which uses the transceivers. For more information on IBERT functionality, see this link in the Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331).