Rails Voltage Status - 2023.2 English

Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2023-11-15
Version
2023.2 English

Confirm that power rails are detected successfully. To ensure that the power rails voltage value is correctly configured on board, read the SysMon registers. 0xF1110100 (PWR_STATUS) and 0xF111010C (PWR_SUPPLY_STATUS) are the registers that supply the power rail.

To read the registers, run the following:

xsct%mrd -force 0xF1110100
xsct%mrd -force 0xF111010C

Confirm that power rails are detected successfully. To ensure that the power rails voltage value is correctly configured on board, read the SysMon register 0xF111010C (PWR_SUPPLY_STATUS) by running the following:

xsct%mrd -force 0xF111010C
Table 1. 11.1.21 Register (PMC_GLOBAL) PWR_STATUS
Register Name Address Width Type Reset Value Description
PWR_STATUS 0xF1110100 32 RO 0x00000000 This register provides the Domain Isolation Status.

1 = isolated

0 = non-isolated

The register is only reset by the Power-on Reset and maintains its state through a System Reset or Internal Power-on Reset.

Table 2. Register PWR_STATUS Bit-Field Details
Field Name Bits Type Reset Value Description
Reserved 31:19 RO 0x0 Reserved
VCCAUX_VCCRAM 18 RO 0x0 VCCAUX-VCCRAM interfaces and signals
VCCRAM_SOC 17 RO 0x0 VCCRAM-SoC interfaces and signals
VCCAUX_SOC 16 RO 0x0 VCCAUX-SoC interfaces and signals
PL_SOC 15 RO 0x0 PL-SoC interfaces and signals
PMC_SOC 14 RO 0x0 PMC-SoC interfaces and signals
PMC_SOC_NPI 13 RO 0x0 PMC-SoC NPI interface and signals
PMC_PL 12 RO 0x0 PMC-PL interfaces and signals
PMC_PL_CFRAME 10 RO 0x0 PMC-PL interfaces and signals
PMC_LPD 9 RO 0x0 PMC-LPD interfaces and signals
LPD_PL 6 RO 0x0 LPD-PL interfaces and signals
LPD_CPM 4 RO 0x0 LPD-CPM interfaces and signals
FPD_SOC 2 RO 0x0 FPD-SoC interfaces and signals
FPD_PL 1 RO 0x0 FPD-PL interfaces and signals
Table 3. 11.1.22 Register (PMC_GLOBAL) PWR_SUPPLY_STATUS
Register Name Address Width Type Reset Value Description
PWR_SUPPLY_STATUS 0xF111010C 32 RO X This register provides the Power Supply Status.
Table 4. Register PWR_SUPPLY_STATUS Bit-Field Details
Field Name Bits Type Reset Value Description
Reserved 31:8 RO 0x0 Reserved
VCC_RAM 7 RO 0x0 RAM main power supply (also known as VCCINT_RAM)
VCCINT 6 RO 0x0 PL main power supply (also known as VCCINT_PL)
VCCAUX_SOC 5 RO 0x0 Auxiliary power supply to SoC (also known as VCCAUX)
VCC_SOC 4 RO 0x0 NoC and DDR memory main power supply (SoC) (also known as VCCINT_SOC)
VCC_LPD 3 RO 0x0 LPD main power supply (also known as VCCINT_LPD)
VCC_FPD 2 RO 0x0 FPD main power supply (also known as VCCINT_FPD)
VCC_PMC 1 RO 0x0 PMC main power supply (also known as VCCINT_PMC)
VCCAUX_PMC 0 RO 0x0 Auxiliary power supply to PMC