PLM-to-PLM Communication in SSI Devices - 2023.2 English

Versal Adaptive SoC System Software Developers Guide (UG1304)

Document ID
Release Date
2023.2 English

XilSEM, XilSecure, XilPUF, and XilNvm require communication between the R5 user application and the PLM to perform certain operations. In SSI devices, the master has a PS block, so IPI communication is possible between the primary SLR and PS. To handle different user requests for different secondary SLRs, the primary SLR must receive PS requests and forward them to the corresponding primary SLR. When a primary SLR detects any errors (for example, in XilSem), it must report it to the R5 application through the primary SLR.

To meet these requirements, the PLM provides a framework for the SLR communications. The PLM uses 4 KB of memory in PMC RAM area for events and request/response buffers.

Note: This feature is enabled only for specific designs that use SSI technology. You can disable this by selecting XilPLMI configuration settings > BSP settings and setting ssit_plm_to_plm_comm_en to false.