BootROM, PLM Handoff State - 2023.2 English

Versal Adaptive SoC System Software Developers Guide (UG1304)

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2023.2 English

The BootROM loads the PLM into the PPU RAM from the boot device and is responsible for releasing the PPU from reset to start the PLM execution.

The PLM ELF is loaded to the PPU RAM. The PMC RAM is used to hold the PMC CDO data file.

The state of the system at BootROM handoff is as follows:

  • The PPU is in the sleep state after the reset release, in case of the JTAG boot mode.
  • The PPU RAM and PMC RAM are initialized with error code correction (ECC).
  • The JTAG IDCODE instruction is always available regardless of the boot mode. Except the JTAG IDCODE instruction, all other JTAG instructions can be disabled when you program the required eFUSEs. If the eFUSEs are not programmed and a secure boot occurs, then only the base JTAG instructions are supported. When the AUTH_JTAG enable instruction is sent in a secure boot mode, the full set of JTAG instructions (base +extended) can be enabled. Refer to the JTAG Interface Protections figure in Versal Adaptive SoC Technical Reference Manual (AM011) for the list of base JTAG instructions.
  • The boot device is taken out of reset and initialized.