The fpgamanager template names got renamed, and the exact mapping is given in the following table.
Outdated templates remain functional, yet it is strongly recommended to adopt new template names.
| Sr No | Design Type | Input Files | Yocto Class Name | PetaLinux Template Name | old Petalinux template name | platform |
|---|---|---|---|---|---|---|
| 1 | NA | dts/dtsi/dtbo, bit.bin or pdi | dfx_user_dts | dfx_user_dts | fpgamanager |
zynq zynqmp versal |
| 2 | Flat | xsa or dtsi | dfx_dtg_zynq_full | dfx_dtg_zynq_full | fpgamanager_dtg | zynq |
| 3 | Flat | xsa or dtsi | dfx_dtg_zynqmp_full | dfx_dtg_zynqmp_full | fpgamanager_dtg | zynqmp |
| 4 | DFX static | xsa or dtsi | dfx_dtg_zynqmp_static | dfx_dtg_zynqmp_static | fpgamanager_dtg | zynqmp |
| 5 | DFX RP | xsa or dtsi | dfx_dtg_zynqmp_partial | dfx_dtg_zynqmp_partial | fpgamanager_dtg_dfx | zynqmp |
| 6 | Flat | xsa or dtsi | dfx_dtg_versal_full | dfx_dtg_versal_full | fpgamanager_dtg_csoc2 | versal |
| 7 | DFX static | xsa or dtsi | dfx_dtg_versal_static | dfx_dtg_versal_static | fpgamanager_dtg | versal |
| 8 | DFX RP | xsa or dtsi | dfx_dtg_versal_partial | dfx_dtg_versal_partial | fpgamanager_dtg_dfx | versal |