Along with the PM module, error management module also uses IPI-0 channel for
message exchange. APU and RPU 0/1 masters can communicate to this module using IPI.
The target_module_id
in IPI message differentiates which module
needs to take an action based on the message received. The
target_module_id
for IPI handler registered for EM module is
0xE. Currently, PMU firmware supports only the messages shown in the following table
using IPI.
S.No | IPI Message | IPI Message ID/API ID |
---|---|---|
1 | Set error action | 0x1 |
2 | Remove error action | 0x2 |
3 | Send errors occurred | 0x3 |
Set Error Action
When this IPI message is received from any target to PMU firmware, PMU firmware sets the error action for the error ID received in the message. If processing of the message is successful, it sends SUCCESS (0x0) response to the target. Otherwise FAILURE (0x1) response will be sent. The message format for the same is as below:
Word | Description |
---|---|
0 | <target_module_id, api_id> |
1 | Error ID. See EM Error ID Table for the Error IDs supported. |
2 | Error Action. See EM Error Action Table for the Error Actions supported. |
Remove Error Action
When this IPI message is received from any target to PMU firmware, EM module IPI handler will remove the error action for the error ID received. And after processing the message, it will send SUCCESS/FAILURE response to the target respectively. The message format for the same is as below:
Word | Description |
---|---|
0 | <target_module_id, api_id> |
1 | Error ID. See EM Error ID Table for the Error IDs supported. |
Send Errors Occurred
PMU firmware saves the errors that occur in the system and sends to the target upon request. The message format is as below:
Word | Description |
---|---|
0 | <target_module_id, api_id> |
The following table shows the response message sent by PMU firmware.
Word | Description |
---|---|
0 | <target_module_id, Success/Failure> |
1 | Error_1 (Bit description is as ERROR_STATUS_1 register in PMU Global registers. If a bit is set to 1, then it means the respective error as described in ERROR_STATUS_1 has occurred) |
2 | Error_2 (Bit description is as ERROR_STATUS_2 register in PMU Global registers. If a bit is set to 1, then it means the respective error as described in ERROR_STATUS_2 has occurred) |
3 | PMU RAM Correctable ECC Count |