MinMax Location - 2023.2 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.2 English

The minMaxLoc function finds the minimum and maximum values in an image and location of those values.


image139
image140

API Syntax

template<int SRC_T,int ROWS,int COLS,int NPC, int XFCVDEPTH_IN = _XFCVDEPTH_DEFAULT>
void minMaxLoc(xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_IN> & _src,int32_t *max_value, int32_t *min_value,uint16_t *_minlocx, uint16_t *_minlocy, uint16_t *_maxlocx, uint16_t *_maxlocy )

Parameter Descriptions

The following table describes the template and the function parameters.

Table 659 Table . minMaxLoc Parameter Description
Parameter Description
SRC_T Input pixel type. 8-bit, unsigned, 1 channel (XF_8UC1), 16-bit, unsigned, 1 channel (XF_16UC1), 16-bit, signed, 1 channel (XF_16SC1), 32-bit, signed, 1 channel (XF_32SC1) are supported.
ROWS Number of rows in the image being processed.
COLS Number of columns in the image being processed.
NPC Number of pixels to be processed per cycle; possible options are XF_NPPC1 and XF_NPPC8 for 1 pixel and 8 pixel operations respectively.
XFCVDEPTH_IN Depth of the input image.
_src Input image
max_val Maximum value in the image, of type int.
min_val Minimum value in the image, of type int.
_minlocx x-coordinate location of the first minimum value.
_minlocy y-coordinate location of the first minimum value.
_maxlocx x-coordinate location of the first maximum value.
_maxlocy y-coordinate location of the first maximum value.

Resource Utilization

The following table summarizes the resource utilization of the minMaxLoc function, generated using Vivado HLS 2019.1 tool for the Xczu9eg-ffvb1156-1-i-es1 FPGA, to process a grayscale HD (1080x1920) image.

Table 660 Table . minMaxLoc Function Resource Utilization Summary
Operating Mode Operating Frequency (MHz) Utilization Estimate
BRAM_18K DSP_48Es FF LUT CLB
1 pixel 300 0 3 451 398 86
8 pixel 150 0 3 1049 1025 220

Performance Estimate

The following table summarizes the performance in different configurations, as generated using Vivado HLS 2019.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1, to process a grayscale HD (1080x1920) image.

Table 661 Table . minMaxLoc Function Performance Estimate Summary
Operating Mode Latency Estimate
Max Latency (ms)
1 pixel operation (300 MHz) 6.9
8 pixel operation (150 MHz) 1.69