The equalizeHist
function performs histogram equalization on input
image or video. It improves the contrast in the image, to stretch out
the intensity range. This function maps one distribution (histogram) to
another distribution (a wider and more uniform distribution of intensity
values), so the intensities are spread over the whole range.
For histogram H[i], the cumulative distribution H’[i] is given as:
The intensities in the equalized image are computed as:
API Syntax
template<int SRC_T, int ROWS, int COLS, int NPC = 1, int XFCVDEPTH_IN = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_IN_1 = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_OUT = _XFCVDEPTH_DEFAULT>
void equalizeHist(xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_IN> & _src,xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_IN_1> & _src1,xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_OUT> & _dst)
Parameter Descriptions
The following table describes the template and the function parameters.
Parameter | Description |
---|---|
SRC_T | Input and output pixel type. Only 8-bit, unsigned, 1 channel is supported (XF_8UC1) |
ROWS | Maximum height of input and output image. |
COLS | Maximum width of input and output image (must be a multiple of 8, for 8-pixel operation) |
NPC | Number of pixels to be processed per cycle XF_NPPC1 XF_NPPC8 are supported |
XFCVDEPTH_IN | Depth of the input image. |
XFCVDEPTH_IN_1 | Depth of the input image. |
XFCVDEPTH_OUT | Depth of the output image. |
_src | Input image |
_src1 | Input image |
_dst | Output image |
Resource Utilization
Resource Utilization
The following table summarizes the resource utilization of the equalizeHist function for Normal Operation (1 pixel) and Resource Optimized (8 pixel) configurations, generated using Vivado HLS 2019.1 version tool for the Xczu9eg-ffvb1156-1-i-es1 FPGA at 300 MHz for 1 pixel and 150 MHz for 8 pixel mode.
Operating Mode | Operating Frequency (MHz) | Utilization Estimate | ||||
---|---|---|---|---|---|---|
BRAM_18K | DSP_48Es | FF | LUT | CLB | ||
1 pixel | 300 | 4 | 5 | 3492 | 1807 | 666 |
8 pixel | 150 | 25 | 5 | 3526 | 2645 | 835 |
Performance Estimate
The following table summarizes a performance estimate of the equalizeHist function for Normal Operation (1 pixel) and Resource Optimized (8 pixel) configurations, generated using Vivado HLS 2019.1version tool for the Xczu9eg-ffvb1156-1-i-es1 FPGA at 300 MHz for 1 pixel and 150 MHz for 8 pixel mode.
Operating Mode | Latency Estimate |
---|---|
Max (ms) | |
1 pixel per clock operation | 13.8 |
8 pixel per clock operation | 3.4 |