Box Filter - 2023.2 English

The boxFilter function performs box filtering on the input image. Box filter acts as a low-pass filter and performs blurring over the image. The boxFilter function or the box blur is a spatial domain linear filter in which each pixel in the resulting image has a value equal to the average value of the neighboring pixels in the image.

API Syntax

template<int BORDER_TYPE, int FILTER_TYPE, int SRC_T, int ROWS, int COLS, int NPC=1, bool USE_URAM=false, int XFCVDEPTH_IN_1 = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_OUT_1 = _XFCVDEPTH_DEFAULT>
void boxFilter(xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_IN_1> & _src_mat, xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_OUT_1> & _dst_mat)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 327 Table 57. boxFilter Parameter Description
Parameter	Description
FILTER_SIZE	Filter size. Filter size of 3(XF_FILTER_3X3), 5(XF_FILTER_5X5) and 7(XF_FILTER_7X7) are supported
BORDER_TYPE	Border Type supported is XF_BORDER_CONSTANT
SRC_T	Input and output pixel type. 8-bit, unsigned, 16-bit unsigned and 16-bit signed, 1 channel is supported (XF_8UC1,XF_16UC1,XF_16SC1)
ROWS	Maximum height of input and output image.
COLS	Maximum width of input and output image (must be multiple of 8, for 8-pixel operation)
NPC	Number of pixels to be processed per cycle; possible options are XF_NPPC1 and XF_NPPC8 for 1 pixel and 8 pixel operations respectively.
USE_URAM	Enable to map storage structures to UltraRAM
XFCVDEPTH_IN_1	Depth of input image
XFCVDEPTH_OUT_1	Depth of output image
_src_mat	Input image
_dst_mat	Output image

Resource Utilization

The following table summarizes the resource utilization of the kernel in different configurations, generated using Vivado HLS 2019.1 tool for the Xczu9eg-ffvb1156-1-i-es1 FPGA, to process a grayscale HD (1080x1920) image.

Table 328 Table 58. boxFilter Function Resource Utilization Summary
Operating Mode	Filter Size	Operating Frequency (MHz)	Utilization Estimate
Operating Mode	Filter Size	Operating Frequency (MHz)	BRAM_18K	DSP_48Es	FF	LUT	CLB
1 Pixel	3x3	300	3	1	545	519	104
	5x5	300	5	1	876	870	189
	7x7	300	7	1	1539	1506	300
8 Pixel	3x3	150	6	8	1002	1368	264
	5x5	150	10	8	1576	3183	611
	7x7	150	14	8	2414	5018	942

The following table summarizes the resource utilization of the kernel in different configurations, generated using the Vivado HLS™ 2019.1 tool for the xczu7ev-ffvc1156-2-e FPGA, to process a grayscale 4K (3840x2160) image with UltraRAM enable.

Table 329 Table 59. boxFilter Function Resource Utilization Summary with UltraRAM enabled
Operating Mode	Filter Size	Operating Frequency (MHz)	Utilization Estimate
Operating Mode	Filter Size	Operating Frequency (MHz)	BRAM_18K	URAM	DSP_48Es	FF	LUT
1 Pixel	3x3	300	0	1	1	821	521
	5x5	300	0	1	1	1204	855
	7x7	300	0	1	1	2083	1431
8 Pixel	3x3	150	0	3	8	1263	1480
	5x5	150	0	5	8	1771	3154
	7x7	150	0	7	8	2700	5411

Performance Estimate

The following table summarizes the performance of the kernel in different configurations, as generated using Vivado HLS 2019.1 tool for the Xczu9eg-ffvb1156-1-i-es1, to process a grayscale HD (1080x1920) image.

Table 330 Table 60. boxFilter Function Performance Estimate Summary
Operating Mode	Operating Frequency (MHz)	Filter Size	Latency Estimate
Operating Mode	Operating Frequency (MHz)	Filter Size	Max Latency (ms)
1 pixel	300	3x3	7.2
	300	5x5	7.21
	300	7x7	7.22
8 pixel	150	3x3	1.7
	150	5x5	1.7
	150	7x7	1.7