Overview - 2023.2 English

Vitis Libraries

Release Date
2023.2 English

Helper class to create URAM array that can be updated every cycle with forwarding regs.

Forwarding regs keeps a history of address and values, and when acess to URAM hits the “cache”, read from URAM is skipped. This addresses the Read-After-Write dependency across iterations. The depth of the cache, specified with the _NCache variable, dependes on the latency of actual write. It is suggested to be set after initial sythesis attempts.

When element can be held in one URAM row (72-bit), this helper would try to pack multiple elements to one row. If it is beyond 72-bits, multiple URAMs will be used to ensure elements can be fetched in one cycle.

To make the cache really functional, HLS needs to be instructed to ignore inter-iteration dependencies on blocks of UramArray objects. Please refer to the test of this module for an example.


This module requires HLS 2019.1 or above.


_WData the width of every element.
_NData the number of elements in the array.
_NCache the number of cache.
template <
    int _WData,
    int _NData,
    int _NCache
class UramArray

// fields

ap_uint <72>* blocks[details::need_num< _WData, _NData >::value_x][details::need_num< _WData, _NData >::value_y]