Profiling - 2023.2 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.2 English

The hardware resource utilizations are listed in the following table. Different tool versions may result slightly different resource.

Table 130 Table 1 : Hardware resources for Merge
Kernel BRAM URAM DSP FF LUT Frequency(MHz)
merge_kernel 73 163 0 57990 41622 240
Table 131 Table 2 : Merge FPGA acceleration benchmark
Graphs (M) NV(M) NE(M) Aver Degree NV Out(M) NE Out(M) Merge in Louvain CPU(s) FPGA(s) Merge Speed Up Louvain Speed Up Estimate Merge Step1 Step1 ns/V Step2 ns/E
as-Skitter 1.62 10.58 6.54 0.11 0.88 25% 1.05 0.33 3.20 1.21 0.05 9.82 12.57
cit-Patents 3.6 15.75 4.38 0.47 9.10 62% 8.13 0.82 9.90 2.26 0.169 14.92 19.73
coPapersCiteseers 0.41 15.29 36.94 0.02 0.19 11% 0.76 0.32 2.43 1.07 0.012 9.21 9.51
coPapersDBLP 0.52 14.54 28.21 0.03 0.49 15% 0.87 0.32 2.76 1.11 0.015 9.25 9.94
europe_osm 48.6 51.55 1.06 22.74 73.66 54% 28.45 14.0 2.04 1.38 1.7 11.13 113.6
graph500-20-64b 1 14.97 16 0.43 5.49 45% 6.69 0.54 12.42 1.71 0.045 14.31 15.73
graph500-21-64b 2 30.3 16 0.91 13.45 48% 15.18 1.2 12.76 1.79 0.09 14.31 17.31
hollywood 1.09 54.46 50.46 0.08 0.56 5% 3.52 1.1 3.17 1.04 0.028 8.19 9.41

Note

  1. Merge running on Intel(R) Xeon(R) Silver 4116 CPU @ 2.10GHz, cache(16896 KB), cores(12).
  2. time unit: s.